Re: [PATCH v1 1/7] dt-bindings: power: Constrain properties for JH7110 PMU

From: Conor Dooley <conor@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Walker Chen <walker.chen@starfivetech.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v1 1/7] dt-bindings: power: Constrain properties for JH7110 PMU
Date: Mon, 17 Apr 2023 19:55:00 +0100	[thread overview]
Message-ID: <20230417-ramrod-carpool-cd05b0def1a2@spud> (raw)
In-Reply-To: <84300997-31f8-b36e-e54e-876c266fc953@starfivetech.com>

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On Fri, Apr 14, 2023 at 10:20:31AM +0800, Changhuang Liang wrote:
> 
> 
> On 2023/4/12 19:29, Krzysztof Kozlowski wrote:
> > On 12/04/2023 11:42, Conor Dooley wrote:
> >> On Wed, Apr 12, 2023 at 04:51:16PM +0800, Changhuang Liang wrote:
> >>>
> >>>
> >>> On 2023/4/12 16:35, Krzysztof Kozlowski wrote:
> >>>> On 11/04/2023 08:47, Changhuang Liang wrote:
> >>>>> When use "starfive,jh7110-pmu-dphy" compatible, do not need the reg and
> >>>>> interrupts properties.
> >>> [...]
> >>>>>  
> >>>>>  description: |
> >>>>>    StarFive JH7110 SoC includes support for multiple power domains which can be
> >>>>> @@ -17,6 +18,7 @@ properties:
> >>>>>    compatible:
> >>>>>      enum:
> >>>>>        - starfive,jh7110-pmu
> >>>>> +      - starfive,jh7110-pmu-dphy
> >>>>
> >>>> You do here much more than commit msg says.
> >>>>
> >>>> Isn'y DPHY a phy? Why is it in power?
> >>>>
> >>>
> >>> OK, I will add more description. This is a power framework used to turn on/off 
> >>> DPHY. So it in power, not a phy.
> 
> I found something wrong with my description here, not turn on/off DPHY,
> is turn on/off DPHY power switch. 
> 
> >>
> >> Perhaps tie it less to its role w/ the phy, and more to do with its
> >> location, say "jh7110-aon-pmu"?
> >> There's already "aon"/"sys"/"stg" stuff used in clock-controller and
> >> syscon compatibles etc.
> >>
> >> Krzysztof, what do you think of that? (if you remember the whole
> >> discussion we previously had about using those identifiers a few weeks
> >> ago).
> > 
> > Depends whether this is the same case or not. AFAIR, for AON/SYS/STG
> > these were blocks with few features, not only clock controller.
> > 
> > This sounds like just phy. Powering on/off phy is still a job of phy
> > controller... unless it is a power domain controller.
> > Best regards,
> > Krzysztof
> > 
> 
> So, next version the compatible can be changed to "jh7110-aon-pmu"?

Hmm, is the dphy the only thing that's power is controlled by registers
in the aon syscon? I tried looking in the "preliminary" TRM that I have,
but it's not really got a proper register map so I could not tell.

If there are, it'd help your case I think Changhuang Liang.

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