From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
virtualization@lists.linux-foundation.org
Cc: 'Paul Walmsley ' <paul.walmsley@sifive.com>,
'Albert Ou ' <aou@eecs.berkeley.edu>,
'Palmer Dabbelt ' <palmer@dabbelt.com>,
'Paolo Bonzini ' <pbonzini@redhat.com>,
'Juergen Gross ' <jgross@suse.com>,
"'Srivatsa S . Bhat '" <srivatsa@csail.mit.edu>,
'Anup Patel ' <anup@brainfault.org>,
'Atish Patra ' <atishp@atishpatra.org>
Subject: [RFC PATCH 13/14] KVM: selftests: riscv: Add RISCV_SBI_EXT_REG
Date: Mon, 17 Apr 2023 12:34:01 +0200 [thread overview]
Message-ID: <20230417103402.798596-14-ajones@ventanamicro.com> (raw)
In-Reply-To: <20230417103402.798596-1-ajones@ventanamicro.com>
Extend __kvm_reg_id() with subtype field support and add
RISCV_SBI_EXT_REG() which uses that field.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
.../selftests/kvm/include/riscv/processor.h | 18 +++++++++++-------
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h
index 1c6908342f22..f052e8be0e42 100644
--- a/tools/testing/selftests/kvm/include/riscv/processor.h
+++ b/tools/testing/selftests/kvm/include/riscv/processor.h
@@ -10,10 +10,10 @@
#include "kvm_util.h"
#include <linux/stringify.h>
-static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
- uint64_t size)
+static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype,
+ uint64_t idx, uint64_t size)
{
- return KVM_REG_RISCV | type | idx | size;
+ return KVM_REG_RISCV | type | subtype | idx | size;
}
#if __riscv_xlen == 64
@@ -22,22 +22,26 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
#define KVM_REG_SIZE_ULONG KVM_REG_SIZE_U32
#endif
-#define RISCV_CONFIG_REG(name) __kvm_reg_id(KVM_REG_RISCV_CONFIG, \
+#define RISCV_CONFIG_REG(name) __kvm_reg_id(KVM_REG_RISCV_CONFIG, 0, \
KVM_REG_RISCV_CONFIG_REG(name), \
KVM_REG_SIZE_ULONG)
-#define RISCV_CORE_REG(name) __kvm_reg_id(KVM_REG_RISCV_CORE, \
+#define RISCV_CORE_REG(name) __kvm_reg_id(KVM_REG_RISCV_CORE, 0, \
KVM_REG_RISCV_CORE_REG(name), \
KVM_REG_SIZE_ULONG)
-#define RISCV_CSR_REG(name) __kvm_reg_id(KVM_REG_RISCV_CSR, \
+#define RISCV_CSR_REG(name) __kvm_reg_id(KVM_REG_RISCV_CSR, 0, \
KVM_REG_RISCV_CSR_REG(name), \
KVM_REG_SIZE_ULONG)
-#define RISCV_TIMER_REG(name) __kvm_reg_id(KVM_REG_RISCV_TIMER, \
+#define RISCV_TIMER_REG(name) __kvm_reg_id(KVM_REG_RISCV_TIMER, 0, \
KVM_REG_RISCV_TIMER_REG(name), \
KVM_REG_SIZE_U64)
+#define RISCV_SBI_EXT_REG(subtype, id) __kvm_reg_id(KVM_REG_RISCV_SBI_EXT, \
+ subtype, id, \
+ KVM_REG_SIZE_ULONG)
+
/* L3 index Bit[47:39] */
#define PGTBL_L3_INDEX_MASK 0x0000FF8000000000ULL
#define PGTBL_L3_INDEX_SHIFT 39
--
2.39.2
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next prev parent reply other threads:[~2023-04-17 11:45 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-17 10:33 [RFC PATCH 00/14] RISC-V: Add steal-time support Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 01/14] RISC-V: paravirt: Add skeleton for pv-time support Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 02/14] RISC-V: Add SBI STA extension definitions Andrew Jones
2023-04-18 18:43 ` Conor Dooley
2023-04-19 8:15 ` Andrew Jones
2023-04-19 16:22 ` Conor Dooley
2023-08-03 1:27 ` Guo Ren
2023-08-03 6:48 ` Andrew Jones
2023-08-05 1:34 ` Guo Ren
2023-08-02 23:32 ` Guo Ren
2023-08-03 7:20 ` Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 03/14] RISC-V: paravirt: Implement steal-time support Andrew Jones
2023-04-18 19:02 ` Conor Dooley
2023-04-19 8:24 ` Andrew Jones
2023-04-19 16:41 ` Conor Dooley
2023-04-19 8:42 ` Andrew Jones
2023-04-19 12:14 ` Andrew Jones
2023-08-02 23:26 ` Guo Ren
2023-08-03 7:04 ` Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 04/14] RISC-V: paravirt: Add kconfigs Andrew Jones
2023-04-18 19:08 ` Conor Dooley
2023-04-17 10:33 ` [RFC PATCH 05/14] RISC-V: KVM: Add SBI STA extension skeleton Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 06/14] RISC-V: KVM: Add steal-update vcpu request Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 07/14] RISC-V: KVM: Add SBI STA info to vcpu_arch Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 08/14] RISC-V: KVM: Implement SBI STA extension Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 09/14] RISC-V: KVM: Add support for SBI extension registers Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 10/14] RISC-V: KVM: Add support for SBI STA registers Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 11/14] KVM: selftests: riscv: Move sbi_ecall to processor.c Andrew Jones
2023-04-17 10:34 ` [RFC PATCH 12/14] KVM: selftests: riscv: Add guest_sbi_probe_extension Andrew Jones
2023-04-17 10:34 ` Andrew Jones [this message]
2023-04-17 10:34 ` [RFC PATCH 14/14] KVM: selftests: riscv: Add steal_time test support Andrew Jones
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