From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
virtualization@lists.linux-foundation.org
Cc: 'Paul Walmsley ' <paul.walmsley@sifive.com>,
'Albert Ou ' <aou@eecs.berkeley.edu>,
'Palmer Dabbelt ' <palmer@dabbelt.com>,
'Paolo Bonzini ' <pbonzini@redhat.com>,
'Juergen Gross ' <jgross@suse.com>,
"'Srivatsa S . Bhat '" <srivatsa@csail.mit.edu>,
'Anup Patel ' <anup@brainfault.org>,
'Atish Patra ' <atishp@atishpatra.org>
Subject: [RFC PATCH 02/14] RISC-V: Add SBI STA extension definitions
Date: Mon, 17 Apr 2023 12:33:50 +0200 [thread overview]
Message-ID: <20230417103402.798596-3-ajones@ventanamicro.com> (raw)
In-Reply-To: <20230417103402.798596-1-ajones@ventanamicro.com>
The SBI STA extension enables steal-time accounting. Add the
definitions it specifies.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/include/asm/sbi.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 945b7be249c1..485b9ec20399 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
SBI_EXT_HSM = 0x48534D,
SBI_EXT_SRST = 0x53525354,
SBI_EXT_PMU = 0x504D55,
+ SBI_EXT_STA = 0x535441,
/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -236,6 +237,20 @@ enum sbi_pmu_ctr_type {
/* Flags defined for counter stop function */
#define SBI_PMU_STOP_FLAG_RESET (1 << 0)
+/* SBI STA (steal-time accounting) extension */
+enum sbi_ext_sta_fid {
+ SBI_EXT_STA_SET_STEAL_TIME_SHMEM = 0,
+};
+
+struct sbi_sta_struct {
+ __le32 sequence;
+ __le32 flags;
+ __le64 steal;
+ u8 preempted;
+ u8 pad[47];
+} __packed;
+
+/* SBI spec version fields */
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
--
2.39.2
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-04-17 10:34 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-17 10:33 [RFC PATCH 00/14] RISC-V: Add steal-time support Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 01/14] RISC-V: paravirt: Add skeleton for pv-time support Andrew Jones
2023-04-17 10:33 ` Andrew Jones [this message]
2023-04-18 18:43 ` [RFC PATCH 02/14] RISC-V: Add SBI STA extension definitions Conor Dooley
2023-04-19 8:15 ` Andrew Jones
2023-04-19 16:22 ` Conor Dooley
2023-08-03 1:27 ` Guo Ren
2023-08-03 6:48 ` Andrew Jones
2023-08-05 1:34 ` Guo Ren
2023-08-02 23:32 ` Guo Ren
2023-08-03 7:20 ` Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 03/14] RISC-V: paravirt: Implement steal-time support Andrew Jones
2023-04-18 19:02 ` Conor Dooley
2023-04-19 8:24 ` Andrew Jones
2023-04-19 16:41 ` Conor Dooley
2023-04-19 8:42 ` Andrew Jones
2023-04-19 12:14 ` Andrew Jones
2023-08-02 23:26 ` Guo Ren
2023-08-03 7:04 ` Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 04/14] RISC-V: paravirt: Add kconfigs Andrew Jones
2023-04-18 19:08 ` Conor Dooley
2023-04-17 10:33 ` [RFC PATCH 05/14] RISC-V: KVM: Add SBI STA extension skeleton Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 06/14] RISC-V: KVM: Add steal-update vcpu request Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 07/14] RISC-V: KVM: Add SBI STA info to vcpu_arch Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 08/14] RISC-V: KVM: Implement SBI STA extension Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 09/14] RISC-V: KVM: Add support for SBI extension registers Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 10/14] RISC-V: KVM: Add support for SBI STA registers Andrew Jones
2023-04-17 10:33 ` [RFC PATCH 11/14] KVM: selftests: riscv: Move sbi_ecall to processor.c Andrew Jones
2023-04-17 10:34 ` [RFC PATCH 12/14] KVM: selftests: riscv: Add guest_sbi_probe_extension Andrew Jones
2023-04-17 10:34 ` [RFC PATCH 13/14] KVM: selftests: riscv: Add RISCV_SBI_EXT_REG Andrew Jones
2023-04-17 10:34 ` [RFC PATCH 14/14] KVM: selftests: riscv: Add steal_time test support Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230417103402.798596-3-ajones@ventanamicro.com \
--to=ajones@ventanamicro.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@atishpatra.org \
--cc=jgross@suse.com \
--cc=kvm-riscv@lists.infradead.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=pbonzini@redhat.com \
--cc=srivatsa@csail.mit.edu \
--cc=virtualization@lists.linux-foundation.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox