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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id v29-20020a50d59d000000b004bf999f8e57sm5781316edi.19.2023.04.17.03.34.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 03:34:12 -0700 (PDT) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: 'Paul Walmsley ' , 'Albert Ou ' , 'Palmer Dabbelt ' , 'Paolo Bonzini ' , 'Juergen Gross ' , "'Srivatsa S . Bhat '" , 'Anup Patel ' , 'Atish Patra ' Subject: [RFC PATCH 03/14] RISC-V: paravirt: Implement steal-time support Date: Mon, 17 Apr 2023 12:33:51 +0200 Message-Id: <20230417103402.798596-4-ajones@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230417103402.798596-1-ajones@ventanamicro.com> References: <20230417103402.798596-1-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230417_033419_179568_4BF1DC24 X-CRM114-Status: GOOD ( 13.63 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org When the SBI STA extension exists we can use it to implement paravirt steal-time support. Fill in the empty pv-time functions with an SBI STA implementation. Signed-off-by: Andrew Jones --- arch/riscv/kernel/paravirt.c | 56 ++++++++++++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c index 141dbcc36fa2..5f8d96b919e4 100644 --- a/arch/riscv/kernel/paravirt.c +++ b/arch/riscv/kernel/paravirt.c @@ -6,12 +6,21 @@ #define pr_fmt(fmt) "riscv-pv: " fmt #include +#include +#include #include #include +#include +#include +#include #include #include #include +#include +#include +#include + struct static_key paravirt_steal_enabled; struct static_key paravirt_steal_rq_enabled; @@ -31,24 +40,65 @@ static int __init parse_no_stealacc(char *arg) early_param("no-steal-acc", parse_no_stealacc); +DEFINE_PER_CPU(struct sbi_sta_struct, steal_time) __aligned(64); + static bool __init has_pv_steal_clock(void) { + if (sbi_probe_extension(SBI_EXT_STA) > 0) { + pr_info("SBI STA extension detected\n"); + return true; + } + return false; } -static int pv_time_cpu_online(unsigned int cpu) +static int sbi_sta_set_steal_time_shmem(unsigned long lo, unsigned long hi, + unsigned long flags) { + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_STA, SBI_EXT_STA_SET_STEAL_TIME_SHMEM, + lo, hi, flags, 0, 0, 0); + if (ret.error) { + if (lo == -1 && hi == -1) + pr_warn("Failed to disable steal-time shmem"); + else + pr_warn("Failed to set steal-time shmem"); + return -ENOMEM; + } + return 0; } +static int pv_time_cpu_online(unsigned int cpu) +{ + struct sbi_sta_struct *st = this_cpu_ptr(&steal_time); + phys_addr_t pa = __pa(st); + unsigned long lo = (unsigned long)pa; + unsigned long hi = IS_ENABLED(CONFIG_32BIT) ? upper_32_bits((u64)pa) : 0; + + return sbi_sta_set_steal_time_shmem(lo, hi, 0); +} + static int pv_time_cpu_down_prepare(unsigned int cpu) { - return 0; + return sbi_sta_set_steal_time_shmem(-1, -1, 0); } static u64 pv_time_steal_clock(int cpu) { - return 0; + struct sbi_sta_struct *st = per_cpu_ptr(&steal_time, cpu); + u32 sequence; + u64 steal; + + do { + sequence = st->sequence; + virt_rmb(); + steal = st->steal; + virt_rmb(); + } while ((sequence & 1) || (sequence != st->sequence)); + + return steal; } int __init pv_time_init(void) -- 2.39.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv