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From: Vipin Sharma <vipinsh@google.com>
To: maz@kernel.org, oliver.upton@linux.dev, james.morse@arm.com,
	 suzuki.poulose@arm.com, yuzenghui@huawei.com,
	catalin.marinas@arm.com,  will@kernel.org, chenhuacai@kernel.org,
	aleksandar.qemu.devel@gmail.com,  tsbogend@alpha.franken.de,
	anup@brainfault.org, atishp@atishpatra.org,
	 paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu,  seanjc@google.com, pbonzini@redhat.com,
	dmatlack@google.com,  ricarkol@google.com
Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	 linux-mips@vger.kernel.org, kvm-riscv@lists.infradead.org,
	 linux-riscv@lists.infradead.org,
	linux-kselftest@vger.kernel.org,  kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org,  Vipin Sharma <vipinsh@google.com>
Subject: [PATCH 6/9] KVM: arm64: Correct the kvm_pgtable_stage2_flush() documentation
Date: Fri, 21 Apr 2023 09:53:02 -0700	[thread overview]
Message-ID: <20230421165305.804301-7-vipinsh@google.com> (raw)
In-Reply-To: <20230421165305.804301-1-vipinsh@google.com>

Remove _range suffix from kvm_pgtable_stage2_flush_range which is used
in documentation of kvm_pgtable_stage2_flush(). There is no function
named kvm_pgtable_stage2_flush_range().

Fixes: 93c66b40d728 ("KVM: arm64: Add support for stage-2 cache flushing in generic page-table")
Signed-off-by: Vipin Sharma <vipinsh@google.com>
---
 arch/arm64/include/asm/kvm_pgtable.h | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h
index 4cd6762bda80..4cd62506c198 100644
--- a/arch/arm64/include/asm/kvm_pgtable.h
+++ b/arch/arm64/include/asm/kvm_pgtable.h
@@ -605,9 +605,8 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
 bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr);
 
 /**
- * kvm_pgtable_stage2_flush_range() - Clean and invalidate data cache to Point
- * 				      of Coherency for guest stage-2 address
- *				      range.
+ * kvm_pgtable_stage2_flush() - Clean and invalidate data cache to Point of
+ *				Coherency for guest stage-2 address range.
  * @pgt:	Page-table structure initialised by kvm_pgtable_stage2_init*().
  * @addr:	Intermediate physical address from which to flush.
  * @size:	Size of the range.
-- 
2.40.0.634.g4ca3ef3211-goog


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  parent reply	other threads:[~2023-04-21 17:38 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-21 16:52 [PATCH 0/9] KVM: arm64: Use MMU read lock for clearing dirty logs Vipin Sharma
2023-04-21 16:52 ` [PATCH 1/9] KVM: selftests: Allow dirty_log_perf_test to clear dirty memory in chunks Vipin Sharma
2023-04-21 16:52 ` [PATCH 2/9] KVM: selftests: Add optional delay between consecutive Clear-Dirty-Log calls Vipin Sharma
2023-04-21 16:52 ` [PATCH 3/9] KVM: selftests: Pass count of read and write accesses from guest to host Vipin Sharma
2023-04-21 16:53 ` [PATCH 4/9] KVM: selftests: Print read and write accesses of pages by vCPUs in dirty_log_perf_test Vipin Sharma
2023-04-21 16:53 ` [PATCH 5/9] KVM: selftests: Allow independent execution of " Vipin Sharma
2023-04-21 16:53 ` Vipin Sharma [this message]
2023-04-21 16:53 ` [PATCH 7/9] KVM: mmu: Move mmu lock/unlock to arch code for clear dirty log Vipin Sharma
2023-04-21 19:43   ` kernel test robot
2023-04-24 16:45     ` Vipin Sharma
2023-04-21 16:53 ` [PATCH 8/9] KMV: arm64: Allow stage2_apply_range_sched() to pass page table walker flags Vipin Sharma
2023-04-21 16:53 ` [PATCH 9/9] KVM: arm64: Run clear-dirty-log under MMU read lock Vipin Sharma
2023-04-21 17:10   ` Marc Zyngier
2023-05-06  0:55     ` Vipin Sharma

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