Re: [PATCH v3 5/7] dt-bindings: soc: starfive: Add StarFive syscon module

Conor Dooley
2023-04-24T17:16:04Z

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On Fri, Apr 14, 2023 at 10:41:55AM +0800, Xingyu Wu wrote:
> From: William Qiu <william.qiu@starfivetech.com>
>
> Add documentation to describe StarFive System Controller Registers.
>
> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> ---
> .../soc/starfive/starfive,jh7110-syscon.yaml | 58 +++++++++++++++++++
> MAINTAINERS | 6 ++
> 2 files changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> new file mode 100644
> index 000000000000..de086e74a229
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 SoC system controller
> +
> +maintainers:
> + - William Qiu <william.qiu@starfivetech.com>
> +
> +description: |
> + The StarFive JH7110 SoC system controller provides register information such
> + as offset, mask and shift to configure related modules such as MMC and PCIe.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - starfive,jh7110-aon-syscon
> + - starfive,jh7110-sys-syscon
> + - const: syscon
> + - const: simple-mfd
> + - items:
> + - const: starfive,jh7110-stg-syscon
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + clock-controller:
> + $ref: /schemas/clock/starfive,jh7110-pll.yaml#
> + type: object
> +
> + power-controller:
> + $ref: /schemas/power/starfive,jh7110-pmu.yaml#
> + type: object

My plan was to grab this patch after the merge window, but there's been
some back and forth [1] about what exactly should be a power-controller
here. Given the merge window is open & I know Emil wants to look at the
various clock bits for the JH7110, I don't think there's a pressing need
for you to do anything here, but figured I'd at least mention how things
are going on this thread too.

Thanks,
Conor.

1 - https://lore.kernel.org/linux-riscv/20230419035646.43702-1-changhuang.liang@starfivetech.com/T/#m708770e9596098214df769bcc2bdaf9c1a46ca98

> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscon@10240000 {
> + compatible = "starfive,jh7110-stg-syscon", "syscon";
> + reg = <0x10240000 0x1000>;
> + };
> +
> + syscon@13030000 {
> + compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
> + reg = <0x13030000 0x1000>;
> + };
> +
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 03051ae2e9e5..0fafeea8ebdb 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19917,6 +19917,11 @@ S: Supported
> F: Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml
> F: drivers/clk/starfive/clk-starfive-jh7110-pll.*
>
> +STARFIVE JH7110 SYSCON
> +M: William Qiu <william.qiu@starfivetech.com>
> +S: Supported
> +F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> +
> STARFIVE JH71X0 CLOCK DRIVERS
> M: Emil Renner Berthing <kernel@esmil.dk>
> M: Hal Feng <hal.feng@starfivetech.com>
> @@ -19954,6 +19959,7 @@ STARFIVE SOC DRIVERS
> M: Conor Dooley <conor@kernel.org>
> S: Maintained
> T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
> +F: Documentation/devicetree/bindings/soc/starfive/
> F: drivers/soc/starfive/
>
> STARFIVE TRNG DRIVER
> --
> 2.25.1
>

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