[RFC PATCH 11/22] riscv: s64ilp32: Add ebpf jit support

guoren
2023-05-18T13:13:03Z

The s64ilp32 uses the rv64 ISA instruction set, not the rv32 ISA. So
bpf_jit_comp32.c can't be used for s64ilp32, and we use bpf_jit_comp64.c
instead. This patch makes s64ilp32 ebpf jit correct and improves the
performance because bpf_jit_comp32.c has significant gaps in mapping
ebpf 64-bit ISA.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
---
arch/riscv/include/asm/extable.h | 2 +-
arch/riscv/net/Makefile | 6 +++---
arch/riscv/net/bpf_jit_comp64.c | 10 +++++-----
3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/riscv/include/asm/extable.h b/arch/riscv/include/asm/extable.h
index 512012d193dc..3ad79a7989e2 100644
--- a/arch/riscv/include/asm/extable.h
+++ b/arch/riscv/include/asm/extable.h
@@ -34,7 +34,7 @@ do { \

bool fixup_exception(struct pt_regs *regs);

-#if defined(CONFIG_BPF_JIT) && defined(CONFIG_ARCH_RV64I)
+#if defined(CONFIG_BPF_JIT) && !defined(CONFIG_ARCH_RV32I)
bool ex_handler_bpf(const struct exception_table_entry *ex, struct pt_regs *regs);
#else
static inline bool
diff --git a/arch/riscv/net/Makefile b/arch/riscv/net/Makefile
index 9a1e5f0a94e5..907edce21acc 100644
--- a/arch/riscv/net/Makefile
+++ b/arch/riscv/net/Makefile
@@ -2,8 +2,8 @@

obj-$(CONFIG_BPF_JIT) += bpf_jit_core.o

-ifeq ($(CONFIG_ARCH_RV64I),y)
- obj-$(CONFIG_BPF_JIT) += bpf_jit_comp64.o
-else
+ifeq ($(CONFIG_ARCH_RV32I),y)
obj-$(CONFIG_BPF_JIT) += bpf_jit_comp32.o
+else
+ obj-$(CONFIG_BPF_JIT) += bpf_jit_comp64.o
endif
diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
index f5a668736c79..5a65cd01c73c 100644
--- a/arch/riscv/net/bpf_jit_comp64.c
+++ b/arch/riscv/net/bpf_jit_comp64.c
@@ -125,7 +125,7 @@ static u8 rv_tail_call_reg(struct rv_jit_context *ctx)

static bool is_32b_int(s64 val)
{
- return -(1L << 31) <= val && val < (1L << 31);
+ return -(1LL << 31) <= val && val < (1LL << 31);
}

static bool in_auipc_jalr_range(s64 val)
@@ -134,15 +134,15 @@ static bool in_auipc_jalr_range(s64 val)
* auipc+jalr can reach any signed PC-relative offset in the range
* [-2^31 - 2^11, 2^31 - 2^11).
*/
- return (-(1L << 31) - (1L << 11)) <= val &&
- val < ((1L << 31) - (1L << 11));
+ return (-(1LL << 31) - (1LL << 11)) <= val &&
+ val < ((1LL << 31) - (1LL << 11));
}

/* Emit fixed-length instructions for address */
static int emit_addr(u8 rd, u64 addr, bool extra_pass, struct rv_jit_context *ctx)
{
- u64 ip = (u64)(ctx->insns + ctx->ninsns);
- s64 off = addr - ip;
+ ulong ip = (ulong)(ctx->insns + ctx->ninsns);
+ s64 off = (ulong)addr - ip;
s64 upper = (off + (1 << 11)) >> 12;
s64 lower = off & 0xfff;