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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id m6-20020a7bce06000000b003f6050d35c9sm20952739wmc.20.2023.05.31.08.07.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 May 2023 08:07:55 -0700 (PDT) Date: Wed, 31 May 2023 17:07:55 +0200 From: Andrew Jones To: Alexandre Ghiti Cc: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 08/10] Documentation: admin-guide: Add riscv sysctl_perf_user_access Message-ID: <20230531-0707dc46df8078cd92711314@orel> References: <20230512085321.13259-1-alexghiti@rivosinc.com> <20230512085321.13259-9-alexghiti@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230512085321.13259-9-alexghiti@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230531_080757_997634_DC13F460 X-CRM114-Status: GOOD ( 22.87 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, May 12, 2023 at 10:53:19AM +0200, Alexandre Ghiti wrote: > riscv now uses this sysctl so document its usage for this architecture. > > Signed-off-by: Alexandre Ghiti > --- > Documentation/admin-guide/sysctl/kernel.rst | 24 +++++++++++++++++---- > 1 file changed, 20 insertions(+), 4 deletions(-) > > diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst > index 4b7bfea28cd7..93cd518ca94b 100644 > --- a/Documentation/admin-guide/sysctl/kernel.rst > +++ b/Documentation/admin-guide/sysctl/kernel.rst > @@ -941,16 +941,32 @@ enabled, otherwise writing to this file will return ``-EBUSY``. > The default value is 8. > > > -perf_user_access (arm64 only) > -================================= > +perf_user_access (arm64 and riscv only) > +======================================= > + > +Controls user space access for reading perf event counters. > > -Controls user space access for reading perf event counters. When set to 1, > -user space can read performance monitor counter registers directly. > +arm64 > +===== > > The default value is 0 (access disabled). > +When set to 1, user space can read performance monitor counter registers > +directly. > > See Documentation/arm64/perf.rst for more information. > > +riscv > +===== > + > +When set to 0, user access is disabled. > + > +When set to 1, user space can read performance monitor counter registers > +directly only through perf, any direct access without perf intervention will > +trigger an illegal instruction. > + > +The default value is 2, which enables legacy mode (user space has direct > +access to cycle, time and insret CSRs only). Note that this legacy value > +is deprecated and will be removed once all userspace applications are fixed. All modes can access the time CSR so I'm not sure if it should be pointed out here as if it's an exception. Maybe we shouldn't point it out at all or we should point it out for all three? Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv