Re: [PATCH v1 1/9] RISC-V: don't parse dt/acpi isa string to get rv32/rv64

Conor Dooley
2023-06-26T16:16:22Z

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On Mon, Jun 26, 2023 at 06:05:40PM +0200, Andrew Jones wrote:
> On Mon, Jun 26, 2023 at 04:51:29PM +0100, Conor Dooley wrote:
> > On Mon, Jun 26, 2023 at 05:14:15PM +0200, Andrew Jones wrote:
> > > On Mon, Jun 26, 2023 at 12:19:39PM +0100, Conor Dooley wrote:
> > > > From: Heiko Stuebner <heiko.stuebner@vrull.eu>
> > > > @@ -333,8 +335,6 @@ static int c_show(struct seq_file *m, void *v)
> > > >
> > > > of_node_put(node);
> > > > } else {
> > > > - if (!acpi_get_riscv_isa(NULL, cpu_id, &isa))
> > > > - print_isa(m, isa);
> > > >
> > >
> > > Extra blank line here to remove. Actually the whole 'else' can be removed
> > > because the print_mmu() call can be brought up above the
> > > 'if (acpi_disabled)'
> >
> > Can it be? I intentionally did not make that change - wasn't sure
> > whether re-ordering the fields in there was permissible.
>
> I agree we shouldn't change the order, but moving print_mmu() up won't,
> afaict.

D'oh, I'm an eejit. Sure, I'll do that for v2. Thanks!

> > One of the few things I know does parsing of /proc/cpuinfo is:
> > https://github.com/google/cpu_features/blob/main/src/impl_riscv_linux.c
> > and that doesn't seem to care about the mmu, but does rely on
> > vendor/uarch ordering.
> >
> > Makes me wonder, does ACPI break things by leaving out uarch/vendor
> > fields, if there is something that expects them to exist? We should
> > not intentionally break stuff in /proc/cpuinfo, but can't say I feel any
> > sympathy for naively parsing it.
>
> Yes, it would be nice for ACPI to be consistent. I'm not sure what can be
> done about that.

Print "unknown", until there's a way of passing the info?
Speaking of being an eejit, adding new fields to the file would probably
break some really naive parsers & quite frankly that sort of thing can
keep the pieces IMO. Ditto if adding more extensions breaks someone that
expects _zicbom_zicboz that breaks when _zicbop is slid into the middle.

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