From: Conor Dooley <conor.dooley@microchip.com>
To: <palmer@dabbelt.com>
Cc: devicetree@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>,
Jonathan Corbet <corbet@lwn.net>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
conor@kernel.org, conor.dooley@microchip.com,
Rob Herring <robh+dt@kernel.org>, Evan Green <evan@rivosinc.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
linux-riscv@lists.infradead.org,
Heiko Stuebner <heiko.stuebner@vrull.eu>,
Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v4 03/11] RISC-V: drop a needless check in print_isa_ext()
Date: Mon, 10 Jul 2023 10:35:38 +0100 [thread overview]
Message-ID: <20230710-map-unlocking-9f674ee171bb@wendy> (raw)
In-Reply-To: <20230710-equipment-stained-dd042d66ba5d@wendy>
isa_ext_arr cannot be empty, as some of the extensions within it are
always built into the kernel. When this code was first added, back in
commit a9b202606c69 ("RISC-V: Improve /proc/cpuinfo output for ISA
extensions"), the array was empty and needed a dummy item & thus there
could be no extensions present. When the first multi-letter ones did
get added, it was Sscofpmf - which didn't have a Kconfig symbol to
disable it.
Remove this check, as it has been redundant since Sscofpmf was added.
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
Changes in v2:
- Reword commit message to explain why this can be dropped
---
arch/riscv/kernel/cpu.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index f808b67f5a27..e721f15fdf17 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -237,10 +237,6 @@ static void print_isa_ext(struct seq_file *f)
arr_sz = ARRAY_SIZE(isa_ext_arr) - 1;
- /* No extension support available */
- if (arr_sz <= 0)
- return;
-
for (i = 0; i <= arr_sz; i++) {
edata = &isa_ext_arr[i];
if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id))
--
2.40.1
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next prev parent reply other threads:[~2023-07-10 9:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-10 9:35 [PATCH v4 00/11] RISC-V: Probe DT extension support using riscv,isa-extensions & riscv,isa-base Conor Dooley
2023-07-10 9:35 ` [PATCH v4 01/11] RISC-V: Provide a more helpful error message on invalid ISA strings Conor Dooley
2023-07-10 9:35 ` [PATCH v4 02/11] RISC-V: don't parse dt/acpi isa string to get rv32/rv64 Conor Dooley
2023-07-10 9:35 ` Conor Dooley [this message]
2023-07-10 9:35 ` [PATCH v4 04/11] RISC-V: shunt isa_ext_arr to cpufeature.c Conor Dooley
2023-07-10 9:35 ` [PATCH v4 05/11] RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap() Conor Dooley
2023-07-12 17:34 ` Evan Green
2023-07-10 9:35 ` [PATCH v4 06/11] RISC-V: add missing single letter extension definitions Conor Dooley
2023-07-10 9:35 ` [PATCH v4 07/11] RISC-V: add single letter extensions to riscv_isa_ext Conor Dooley
2023-07-10 9:35 ` [PATCH v4 08/11] RISC-V: split riscv_fill_hwcap() in 3 Conor Dooley
2023-07-10 9:35 ` [PATCH v4 09/11] RISC-V: enable extension detection from new properties Conor Dooley
2023-07-10 9:35 ` [PATCH v4 10/11] RISC-V: try new extension properties in of_early_processor_hartid() Conor Dooley
2023-07-10 9:35 ` [PATCH v4 11/11] RISC-V: provide Kconfig & commandline options to control parsing "riscv,isa" Conor Dooley
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