From: Conor Dooley <conor.dooley@microchip.com>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Anup Patel <anup@brainfault.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
linux-kernel@vger.kernel.org, Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Atish Patra <atishp@atishpatra.org>,
Thomas Gleixner <tglx@linutronix.de>,
linux-riscv@lists.infradead.org,
Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH 0/2] Misc RISC-V timer driver improvements
Date: Tue, 11 Jul 2023 12:20:43 +0100 [thread overview]
Message-ID: <20230711-remission-from-581829b1ff05@wendy> (raw)
In-Reply-To: <20230710131902.1459180-1-apatel@ventanamicro.com>
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On Mon, Jul 10, 2023 at 06:49:00PM +0530, Anup Patel wrote:
> This series does two improvements to the RISC-V timer driver:
> 1) Keep timer interrupt enable state in-sync with interrupt subsystem
> 2) Increase rating of clock event device when Sstc is available
>
> These patches can also be found in the riscv_timer_imp_v1 branch at:
> https://github.com/avpatel/linux.git
Other than wondering why you opted for 450 (curiosity really), this
stuff looks fine to me.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
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next prev parent reply other threads:[~2023-07-11 11:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-10 13:19 [PATCH 0/2] Misc RISC-V timer driver improvements Anup Patel
2023-07-10 13:19 ` [PATCH 1/2] clocksource: timer-riscv: Don't enable/disable timer interrupt Anup Patel
2023-07-10 13:19 ` [PATCH 2/2] clocksource: timer-riscv: Increase rating of clock_event_device for Sstc Anup Patel
2023-07-11 11:20 ` Conor Dooley [this message]
2023-07-11 11:37 ` [PATCH 0/2] Misc RISC-V timer driver improvements Anup Patel
2023-07-11 11:38 ` Conor Dooley
2023-08-16 14:24 ` Palmer Dabbelt
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