From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Atish Patra <atishp@atishpatra.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>,
Heiko Stuebner <heiko@sntech.de>,
Samuel Ortiz <sameo@rivosinc.com>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 3/7] RISC-V: KVM: Allow Zba and Zbs extensions for Guest/VM
Date: Wed, 12 Jul 2023 21:40:43 +0530 [thread overview]
Message-ID: <20230712161047.1764756-4-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230712161047.1764756-1-apatel@ventanamicro.com>
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zba and Zbs extensions for Guest/VM.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 2 ++
arch/riscv/kvm/vcpu_onereg.c | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index 6c2285f86545..68f929d88f43 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -124,6 +124,8 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_SSAIA,
KVM_RISCV_ISA_EXT_V,
KVM_RISCV_ISA_EXT_SVNAPOT,
+ KVM_RISCV_ISA_EXT_ZBA,
+ KVM_RISCV_ISA_EXT_ZBS,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 236359722364..555acebcbe02 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -37,7 +37,9 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(SVINVAL),
KVM_ISA_EXT_ARR(SVNAPOT),
KVM_ISA_EXT_ARR(SVPBMT),
+ KVM_ISA_EXT_ARR(ZBA),
KVM_ISA_EXT_ARR(ZBB),
+ KVM_ISA_EXT_ARR(ZBS),
KVM_ISA_EXT_ARR(ZIHINTPAUSE),
KVM_ISA_EXT_ARR(ZICBOM),
KVM_ISA_EXT_ARR(ZICBOZ),
@@ -81,7 +83,9 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_SVINVAL:
case KVM_RISCV_ISA_EXT_SVNAPOT:
case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:
+ case KVM_RISCV_ISA_EXT_ZBA:
case KVM_RISCV_ISA_EXT_ZBB:
+ case KVM_RISCV_ISA_EXT_ZBS:
return false;
default:
break;
--
2.34.1
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next prev parent reply other threads:[~2023-07-12 16:11 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 16:10 [PATCH 0/7] KVM RISC-V ONE_REG ISA extension improvements Anup Patel
2023-07-12 16:10 ` [PATCH 1/7] RISC-V: KVM: Factor-out ONE_REG related code to its own source file Anup Patel
2023-07-13 10:57 ` Andrew Jones
2023-07-12 16:10 ` [PATCH 2/7] RISC-V: KVM: Extend ONE_REG to enable/disable multiple ISA extensions Anup Patel
2023-07-13 11:27 ` Andrew Jones
2023-07-12 16:10 ` Anup Patel [this message]
2023-07-13 11:32 ` [PATCH 3/7] RISC-V: KVM: Allow Zba and Zbs extensions for Guest/VM Andrew Jones
2023-07-12 16:10 ` [PATCH 4/7] RISC-V: KVM: Allow Zicntr, Zicsr, Zifencei, and Zihpm " Anup Patel
2023-07-13 11:45 ` Andrew Jones
2023-07-12 16:10 ` [PATCH 5/7] RISC-V: KVM: Sort ISA extensions alphabetically in ONE_REG interface Anup Patel
2023-07-13 11:47 ` Andrew Jones
2023-07-12 16:10 ` [PATCH 6/7] RISC-V: KVM: Allow Zbc, Zbk* and Zk* extensions for Guest/VM Anup Patel
2023-07-13 12:48 ` Andrew Jones
2023-07-12 16:10 ` [PATCH 7/7] RISC-V: KVM: Allow Zvb* and Zvk* " Anup Patel
2023-07-13 12:49 ` Andrew Jones
2023-07-17 3:54 ` [PATCH 0/7] KVM RISC-V ONE_REG ISA extension improvements Anup Patel
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