From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Atish Patra <atishp@atishpatra.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>,
Heiko Stuebner <heiko@sntech.de>,
Samuel Ortiz <sameo@rivosinc.com>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 5/7] RISC-V: KVM: Sort ISA extensions alphabetically in ONE_REG interface
Date: Wed, 12 Jul 2023 21:40:45 +0530 [thread overview]
Message-ID: <20230712161047.1764756-6-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230712161047.1764756-1-apatel@ventanamicro.com>
Let us sort isa extensions alphabetically in kvm_isa_ext_arr[] and
kvm_riscv_vcpu_isa_disable_allowed() so that future insertions are
more predictable.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/kvm/vcpu_onereg.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index e73f9b105a02..36871a417e69 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -23,6 +23,7 @@
/* Mapping between KVM ISA Extension ID & Host ISA extension ID */
static const unsigned long kvm_isa_ext_arr[] = {
+ /* Single letter extensions (alphabetically sorted) */
[KVM_RISCV_ISA_EXT_A] = RISCV_ISA_EXT_a,
[KVM_RISCV_ISA_EXT_C] = RISCV_ISA_EXT_c,
[KVM_RISCV_ISA_EXT_D] = RISCV_ISA_EXT_d,
@@ -31,7 +32,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
[KVM_RISCV_ISA_EXT_I] = RISCV_ISA_EXT_i,
[KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m,
[KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v,
-
+ /* Multi letter extensions (alphabetically sorted) */
KVM_ISA_EXT_ARR(SSAIA),
KVM_ISA_EXT_ARR(SSTC),
KVM_ISA_EXT_ARR(SVINVAL),
@@ -40,13 +41,13 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(ZBA),
KVM_ISA_EXT_ARR(ZBB),
KVM_ISA_EXT_ARR(ZBS),
+ KVM_ISA_EXT_ARR(ZICBOM),
+ KVM_ISA_EXT_ARR(ZICBOZ),
KVM_ISA_EXT_ARR(ZICNTR),
KVM_ISA_EXT_ARR(ZICSR),
KVM_ISA_EXT_ARR(ZIFENCEI),
KVM_ISA_EXT_ARR(ZIHINTPAUSE),
KVM_ISA_EXT_ARR(ZIHPM),
- KVM_ISA_EXT_ARR(ZICBOM),
- KVM_ISA_EXT_ARR(ZICBOZ),
};
static unsigned long kvm_riscv_vcpu_base2isa_ext(unsigned long base_ext)
@@ -86,14 +87,14 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_SSTC:
case KVM_RISCV_ISA_EXT_SVINVAL:
case KVM_RISCV_ISA_EXT_SVNAPOT:
+ case KVM_RISCV_ISA_EXT_ZBA:
+ case KVM_RISCV_ISA_EXT_ZBB:
+ case KVM_RISCV_ISA_EXT_ZBS:
case KVM_RISCV_ISA_EXT_ZICNTR:
case KVM_RISCV_ISA_EXT_ZICSR:
case KVM_RISCV_ISA_EXT_ZIFENCEI:
case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:
case KVM_RISCV_ISA_EXT_ZIHPM:
- case KVM_RISCV_ISA_EXT_ZBA:
- case KVM_RISCV_ISA_EXT_ZBB:
- case KVM_RISCV_ISA_EXT_ZBS:
return false;
default:
break;
--
2.34.1
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next prev parent reply other threads:[~2023-07-12 16:11 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 16:10 [PATCH 0/7] KVM RISC-V ONE_REG ISA extension improvements Anup Patel
2023-07-12 16:10 ` [PATCH 1/7] RISC-V: KVM: Factor-out ONE_REG related code to its own source file Anup Patel
2023-07-13 10:57 ` Andrew Jones
2023-07-12 16:10 ` [PATCH 2/7] RISC-V: KVM: Extend ONE_REG to enable/disable multiple ISA extensions Anup Patel
2023-07-13 11:27 ` Andrew Jones
2023-07-12 16:10 ` [PATCH 3/7] RISC-V: KVM: Allow Zba and Zbs extensions for Guest/VM Anup Patel
2023-07-13 11:32 ` Andrew Jones
2023-07-12 16:10 ` [PATCH 4/7] RISC-V: KVM: Allow Zicntr, Zicsr, Zifencei, and Zihpm " Anup Patel
2023-07-13 11:45 ` Andrew Jones
2023-07-12 16:10 ` Anup Patel [this message]
2023-07-13 11:47 ` [PATCH 5/7] RISC-V: KVM: Sort ISA extensions alphabetically in ONE_REG interface Andrew Jones
2023-07-12 16:10 ` [PATCH 6/7] RISC-V: KVM: Allow Zbc, Zbk* and Zk* extensions for Guest/VM Anup Patel
2023-07-13 12:48 ` Andrew Jones
2023-07-12 16:10 ` [PATCH 7/7] RISC-V: KVM: Allow Zvb* and Zvk* " Anup Patel
2023-07-13 12:49 ` Andrew Jones
2023-07-17 3:54 ` [PATCH 0/7] KVM RISC-V ONE_REG ISA extension improvements Anup Patel
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