From: Eric Biggers <ebiggers@kernel.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: palmer@dabbelt.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, herbert@gondor.apana.org.au,
davem@davemloft.net, conor.dooley@microchip.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-crypto@vger.kernel.org, christoph.muellner@vrull.eu,
Heiko Stuebner <heiko.stuebner@vrull.eu>
Subject: Re: [PATCH v4 04/12] RISC-V: add vector crypto extension detection
Date: Thu, 20 Jul 2023 22:48:12 -0700 [thread overview]
Message-ID: <20230721054812.GE847@sol.localdomain> (raw)
In-Reply-To: <20230711153743.1970625-5-heiko@sntech.de>
On Tue, Jul 11, 2023 at 05:37:35PM +0200, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@vrull.eu>
>
> Add detection for some extensions of the vector-crypto specification:
> - Zvkb: Vector Bit-manipulation used in Cryptography
> - Zvkg: Vector GCM/GMAC
> - Zvknha and Zvknhb: NIST Algorithm Suite
> - Zvkns: AES-128, AES-256 Single Round Suite
> - Zvksed: ShangMi Algorithm Suite
> - Zvksh: ShangMi Algorithm Suite
>
> As their use is very specific and will likely be limited to special places
> we expect current code to just pre-encode those instructions, so right now
> we don't introduce toolchain requirements.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> ---
> arch/riscv/include/asm/hwcap.h | 9 ++++++
> arch/riscv/kernel/cpu.c | 8 ++++++
> arch/riscv/kernel/cpufeature.c | 50 ++++++++++++++++++++++++++++++++++
> 3 files changed, 67 insertions(+)
>
> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> index b80ca6e77088..0f5172fa87b0 100644
> --- a/arch/riscv/include/asm/hwcap.h
> +++ b/arch/riscv/include/asm/hwcap.h
> @@ -64,6 +64,15 @@
> #define RISCV_ISA_EXT_ZKSED 51
> #define RISCV_ISA_EXT_ZKSH 52
> #define RISCV_ISA_EXT_ZKT 53
> +#define RISCV_ISA_EXT_ZVBB 54
> +#define RISCV_ISA_EXT_ZVBC 55
> +#define RISCV_ISA_EXT_ZVKG 56
> +#define RISCV_ISA_EXT_ZVKNED 57
> +#define RISCV_ISA_EXT_ZVKNHA 58
> +#define RISCV_ISA_EXT_ZVKNHB 59
> +#define RISCV_ISA_EXT_ZVKSED 60
> +#define RISCV_ISA_EXT_ZVKSH 61
> +#define RISCV_ISA_EXT_ZVKT 62
It would be helpful if each RISCV_ISA_EXT_* definition had a comment that spells
out what it stands for, similar to what arch/x86/include/asm/cpufeatures.h does.
I know they can all be looked up, and they're sort of mnemonic, but it would be
helpful.
- Eric
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next prev parent reply other threads:[~2023-07-21 5:48 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-11 15:37 [PATCH v4 00/12] RISC-V: support some cryptography accelerations Heiko Stuebner
2023-07-11 15:37 ` [PATCH v4 01/12] riscv: Add support for kernel mode vector Heiko Stuebner
2023-07-11 17:11 ` Rémi Denis-Courmont
2023-07-13 17:19 ` Andy Chiu
2023-07-11 15:37 ` [PATCH v4 02/12] riscv: Add vector extension XOR implementation Heiko Stuebner
2023-07-11 17:33 ` Rémi Denis-Courmont
2023-07-11 15:37 ` [PATCH v4 03/12] RISC-V: add helper function to read the vector VLEN Heiko Stuebner
2023-07-11 18:06 ` Rémi Denis-Courmont
2023-07-11 15:37 ` [PATCH v4 04/12] RISC-V: add vector crypto extension detection Heiko Stuebner
2023-07-12 10:40 ` Anup Patel
2023-07-18 14:55 ` Conor Dooley
2023-07-21 5:48 ` Eric Biggers [this message]
2023-07-11 15:37 ` [PATCH v4 05/12] RISC-V: crypto: update perl include with helpers for vector (crypto) instructions Heiko Stuebner
2023-07-11 18:04 ` Rémi Denis-Courmont
2023-07-11 15:37 ` [PATCH v4 06/12] RISC-V: crypto: add Zvbb+Zvbc accelerated GCM GHASH implementation Heiko Stuebner
2023-08-10 9:57 ` Andy Chiu
2023-07-11 15:37 ` [PATCH v4 07/12] RISC-V: crypto: add Zvkg " Heiko Stuebner
2023-07-11 15:37 ` [PATCH v4 08/12] RISC-V: crypto: add a vector-crypto-accelerated SHA256 implementation Heiko Stuebner
2023-07-21 4:42 ` Eric Biggers
2023-07-11 15:37 ` [PATCH v4 09/12] RISC-V: crypto: add a vector-crypto-accelerated SHA512 implementation Heiko Stuebner
2023-07-11 15:37 ` [PATCH v4 10/12] RISC-V: crypto: add Zvkned accelerated AES encryption implementation Heiko Stuebner
2023-07-21 5:40 ` Eric Biggers
2023-07-21 11:39 ` Ard Biesheuvel
2023-07-21 14:23 ` Ard Biesheuvel
2023-09-11 13:06 ` Jerry Shih
2023-09-12 7:04 ` Ard Biesheuvel
2023-09-12 7:15 ` Jerry Shih
2023-09-15 1:28 ` He-Jie Shih
2023-07-11 15:37 ` [PATCH v4 11/12] RISC-V: crypto: add Zvksed accelerated SM4 " Heiko Stuebner
2023-07-11 15:37 ` [PATCH v4 12/12] RISC-V: crypto: add Zvksh accelerated SM3 hash implementation Heiko Stuebner
2023-07-13 7:40 ` [PATCH v4 00/12] RISC-V: support some cryptography accelerations Eric Biggers
2023-07-14 6:27 ` Eric Biggers
2023-07-14 7:02 ` Heiko Stuebner
2023-07-21 5:12 ` Eric Biggers
2023-09-14 0:11 ` Eric Biggers
2023-09-14 1:10 ` Charlie Jenkins
2023-09-15 1:48 ` He-Jie Shih
2023-09-15 3:21 ` Jerry Shih
2023-10-06 19:47 ` Eric Biggers
2023-10-06 21:01 ` He-Jie Shih
2023-10-06 23:33 ` Ard Biesheuvel
2023-10-07 22:16 ` Eric Biggers
2023-10-07 21:30 ` Eric Biggers
2023-10-31 2:17 ` Jerry Shih
2023-11-02 4:03 ` Eric Biggers
2023-11-21 23:51 ` Eric Biggers
2023-11-22 7:58 ` Jerry Shih
2023-11-22 23:42 ` Eric Biggers
2023-11-23 0:36 ` Christoph Müllner
2023-11-28 20:19 ` Eric Biggers
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