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From: Andrew Jones <ajones@ventanamicro.com>
To: Haibo Xu <xiaobo55x@gmail.com>
Cc: Sean Christopherson <seanjc@google.com>,
	 Haibo Xu <haibo1.xu@intel.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Paolo Bonzini <pbonzini@redhat.com>,
	Shuah Khan <shuah@kernel.org>, Anup Patel <anup@brainfault.org>,
	 Atish Patra <atishp@atishpatra.org>,
	Vipin Sharma <vipinsh@google.com>,
	 Colton Lewis <coltonlewis@google.com>,
	Marc Zyngier <maz@kernel.org>,
	 Andrew Jones <andrew.jones@linux.dev>,
	Vishal Annapurve <vannapurve@google.com>,
	 linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	kvm@vger.kernel.org,  linux-kselftest@vger.kernel.org,
	kvm-riscv@lists.infradead.org
Subject: Re: [PATCH 0/4] RISCV: Add kvm Sstc timer selftest
Date: Fri, 28 Jul 2023 11:57:00 +0200	[thread overview]
Message-ID: <20230728-5b0f530eba70ad08e8f4a67d@orel> (raw)
In-Reply-To: <CAJve8o=GZnLLedT7TvCLvgd5Z3ZxJNfM6gG03Eyc+7krtMY--g@mail.gmail.com>

On Fri, Jul 28, 2023 at 09:37:36AM +0800, Haibo Xu wrote:
> On Thu, Jul 27, 2023 at 11:14 PM Sean Christopherson <seanjc@google.com> wrote:
> >
> > On Thu, Jul 27, 2023, Haibo Xu wrote:
> > > The sstc_timer selftest is used to validate Sstc timer functionality
> > > in a guest, which sets up periodic timer interrupts and check the
> > > basic interrupt status upon its receipt.
> > >
> > > This KVM selftest was ported from aarch64 arch_timer and tested
> > > with Linux v6.5-rc3 on a Qemu riscv64 virt machine.
> >
> > Would it be possible to extract the ARM bits from arch_timer and make the bulk of
> > the test common to ARM and RISC-V?  At a glance, there is quite a bit of copy+paste.
> 
> Sure, I will have a try to consolidate the common code for ARM and RISC-V in v2.
>

Yes, afaict, we should be able to make aarch64/arch_timer.c another "split
test", like we did for aarch64/get-reg-list.c, but before we do that, I'd
like to get an ack from the Arm maintainers on the get-reg-list split to
be sure that approach is acceptable.

Thanks,
drew

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  reply	other threads:[~2023-07-28  9:57 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-27  7:20 [PATCH 0/4] RISCV: Add kvm Sstc timer selftest Haibo Xu
2023-07-27  7:20 ` [PATCH 1/4] tools: riscv: Add header file csr.h Haibo Xu
2023-07-28  9:43   ` Andrew Jones
2023-08-02  2:05     ` Haibo Xu
2023-08-03  3:13       ` Guo Ren
2023-08-03  7:44         ` Andrew Jones
2023-08-05  1:31           ` Guo Ren
2023-07-27  7:20 ` [PATCH 2/4] KVM: riscv: selftests: Add exception handling support Haibo Xu
2023-07-28  9:37   ` Andrew Jones
2023-07-28 15:53     ` Sean Christopherson
2023-08-02  1:49       ` Haibo Xu
2023-08-02  1:46     ` Haibo Xu
2023-07-27  7:20 ` [PATCH 3/4] KVM: riscv: selftests: Add guest helper to get vcpu id Haibo Xu
2023-07-28  9:49   ` Andrew Jones
2023-08-02  2:02     ` Haibo Xu
2023-07-27  7:20 ` [PATCH 4/4] KVM: riscv: selftests: Add sstc_timer test Haibo Xu
2023-07-27 15:14 ` [PATCH 0/4] RISCV: Add kvm Sstc timer selftest Sean Christopherson
2023-07-28  1:37   ` Haibo Xu
2023-07-28  9:57     ` Andrew Jones [this message]
2023-08-02  2:01       ` Haibo Xu
2023-08-02 22:16 ` Sean Christopherson
2023-08-03  0:26   ` Haibo Xu
2023-08-27  8:59   ` Haibo Xu
2023-08-28 14:08     ` Sean Christopherson
2023-08-29  5:04       ` Haibo Xu

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