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Wysocki" , Catalin Marinas , Atish Kumar Patra , Conor Dooley , Will Deacon , Haibo Xu , Jonathan Corbet , Marc Zyngier , Daniel Lezcano , Robert Moore , Andrew Jones , Albert Ou , Paul Walmsley , Bjorn Helgaas , Thomas Gleixner , Andy Shevchenko , Greg Kroah-Hartman , Daniel Scally , Palmer Dabbelt , Sakari Ailus , Anup Patel , Len Brown Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This series adds support for the below ECRs approved by ASWG recently. 1) MADT - https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view?usp=sharing 2) RHCT - https://drive.google.com/file/d/1sKbOa8m1UZw1JkquZYe3F1zQBN1xXsaf/view?usp=sharing The series primarily adds below features. 1) ACPI support for external interrupt controller drivers (IMSIC, APLIC and PLIC). 2) Get CBO block sizes from RHCT. 3) Set timer_can_not_wakeup in timer driver based on the flag in RHCT. PCI ACPI related functions are migrated from arm64 to common file so that we don't need to duplicate them for RISC-V. It uses software node framework to create the fwnode for the interrupt controllers. This helps in keeping the actual drivers code mostly common for DT and ACPI. This series is based on Anup's AIA v7 series. The first 2 ACPICA patches in this series will be merged via ACPICA release process. PATCH3 is a fix patch. These patches are included in this series only to enable build. To test the series, 1) Qemu should be built using the riscv_acpi_b2_v1_plic branch at https://github.com/vlsunil/qemu.git 2) EDK2 should be built using the instructions at: https://github.com/tianocore/edk2/blob/master/OvmfPkg/RiscVVirt/README.md 3) Build Linux using this series on top of Anup's AIA v7 series. Run Qemu: qemu-system-riscv64 \ -M virt,pflash0=pflash0,pflash1=pflash1,aia=aplic-imsic \ -m 2G -smp 8 \ -serial mon:stdio \ -device virtio-gpu-pci -full-screen \ -device qemu-xhci \ -device usb-kbd \ -blockdev node-name=pflash0,driver=file,read-only=on,filename=RISCV_VIRT_CODE.fd \ -blockdev node-name=pflash1,driver=file,filename=RISCV_VIRT_VARS.fd \ -netdev user,id=net0 -device virtio-net-pci,netdev=net0 \ -kernel arch/riscv/boot/Image \ -initrd rootfs.cpio \ -append "root=/dev/ram ro console=ttyS0 rootwait earlycon=uart8250,mmio,0x10000000" To boot with APLIC only, use aia=aplic. To boot with PLIC, remove aia= option. This series is also available in riscv_acpi_b2_v1 brach at https://github.com/vlsunil/linux.git Based-on: 20230802150018.327079-1-apatel@ventanamicro.com (https://lore.kernel.org/lkml/20230802150018.327079-1-apatel@ventanamicro.com/) Anup Patel (1): swnode: Add support to create early during boot Sunil V L (20): ACPICA: MADT: Add RISC-V external interrupt controllers ACPICA: RHCT: Add flags, CMO and MMU nodes RISC-V: ACPI: Fix acpi_os_ioremap to return iomem address RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping arm64: PCI: Migrate ACPI related functions to pci-acpi.c RISC-V: ACPI: Implement PCI related functionality RISC-V: Kconfig: Select ECAM and MCFG RISC-V: ACPI: RHCT: Add function to get CBO block sizes RISC-V: cacheflush: Initialize CBO variables on ACPI systems clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu irqchip/riscv-intc: Use swnode framework to create fwnode irqchip/riscv-imsic-early: Add ACPI support ACPI: bus: Add acpi_riscv_init function ACPI: RISC-V: Create IMSIC platform device ACPI: Add APLIC IRQ model for RISC-V ACPI: RISC-V: Create APLIC platform device irqchip/irq-riscv-aplic-msi: Add ACPI support ACPI: bus: Add PLIC IRQ model RISC-V: ACPI: Create PLIC platform device irqchip/sifive-plic: Add GSI conversion support Documentation/riscv/acpi.rst | 33 ++ arch/arm64/kernel/pci.c | 193 --------- arch/riscv/Kconfig | 3 + arch/riscv/include/asm/acpi.h | 21 +- arch/riscv/kernel/acpi.c | 120 +++++- arch/riscv/mm/cacheflush.c | 37 +- drivers/acpi/bus.c | 7 + drivers/acpi/riscv/Makefile | 2 +- drivers/acpi/riscv/init.c | 16 + drivers/acpi/riscv/init.h | 6 + drivers/acpi/riscv/irqchip.c | 507 ++++++++++++++++++++++++ drivers/acpi/riscv/rhct.c | 61 +++ drivers/base/swnode.c | 117 +++++- drivers/clocksource/timer-riscv.c | 4 + drivers/irqchip/irq-riscv-aplic-msi.c | 14 +- drivers/irqchip/irq-riscv-imsic-early.c | 28 ++ drivers/irqchip/irq-riscv-imsic-state.c | 33 +- drivers/irqchip/irq-riscv-intc.c | 12 +- drivers/irqchip/irq-sifive-plic.c | 16 + drivers/pci/pci-acpi.c | 182 +++++++++ include/acpi/actbl2.h | 76 +++- include/linux/acpi.h | 8 + include/linux/property.h | 3 + 23 files changed, 1248 insertions(+), 251 deletions(-) create mode 100644 drivers/acpi/riscv/init.c create mode 100644 drivers/acpi/riscv/init.h create mode 100644 drivers/acpi/riscv/irqchip.c -- 2.39.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv