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From: William Qiu <william.qiu@starfivetech.com>
To: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-pwm@vger.kernel.org>
Cc: "Emil Renner Berthing" <kernel@esmil.dk>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Hal Feng" <hal.feng@starfivetech.com>,
	"William Qiu" <william.qiu@starfivetech.com>
Subject: [RFC v4 3/4] riscv: dts: starfive: jh7110: Add PWM node and pins configuration
Date: Fri, 25 Aug 2023 16:13:27 +0800	[thread overview]
Message-ID: <20230825081328.204442-4-william.qiu@starfivetech.com> (raw)
In-Reply-To: <20230825081328.204442-1-william.qiu@starfivetech.com>

Add StarFive JH7110 PWM controller node and add PWM pins configuration
on VisionFive 2 board.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
---
 .../jh7110-starfive-visionfive-2.dtsi         | 22 +++++++++++++++++++
 arch/riscv/boot/dts/starfive/jh7110.dtsi      |  9 ++++++++
 2 files changed, 31 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index fa0061eb33a7..eba7331e1fe1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -143,6 +143,12 @@ &i2c6 {
 	status = "okay";
 };

+&ptc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm_pins>;
+	status = "okay";
+};
+
 &sysgpio {
 	i2c0_pins: i2c0-0 {
 		i2c-pins {
@@ -200,6 +206,22 @@ GPOEN_SYS_I2C6_DATA,
 		};
 	};

+	pwm_pins: pwm-0 {
+		pwm-pins {
+			pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
+					      GPOEN_SYS_PWM0_CHANNEL0,
+					      GPI_NONE)>,
+				 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
+					      GPOEN_SYS_PWM0_CHANNEL1,
+					      GPI_NONE)>;
+			bias-disable;
+			drive-strength = <12>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+	};
+
 	uart0_pins: uart0-0 {
 		tx-pins {
 			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index ec2e70011a73..2c808ea3ed40 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -473,6 +473,15 @@ i2c6: i2c@12060000 {
 			status = "disabled";
 		};

+		ptc: pwm@120d0000 {
+			compatible = "starfive,jh7110-pwm";
+			reg = <0x0 0x120d0000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_PWM_APB>;
+			resets = <&syscrg JH7110_SYSRST_PWM_APB>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		syscrg: clock-controller@13020000 {
 			compatible = "starfive,jh7110-syscrg";
 			reg = <0x0 0x13020000 0x0 0x10000>;
--
2.34.1


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  parent reply	other threads:[~2023-08-25  8:14 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-25  8:13 [RFC v4 0/4] StarFive's Pulse Width Modulation driver support William Qiu
2023-08-25  8:13 ` [RFC v4 1/4] dt-bindings: pwm: Add StarFive PWM module William Qiu
2023-08-25  8:13 ` [RFC v4 2/4] pwm: starfive: Add PWM driver support William Qiu
2023-09-12 15:04   ` Emil Renner Berthing
2023-09-13 10:57     ` William Qiu
2023-08-25  8:13 ` William Qiu [this message]
2023-08-25  8:13 ` [RFC v4 4/4] riscv: dts: starfive: jh7100: Add PWM node and pins configuration William Qiu
2023-08-29  7:44   ` Hal Feng
2023-08-29  9:38   ` Emil Renner Berthing
2023-08-29  9:41     ` William Qiu
2023-08-25 15:06 ` [RFC v4 0/4] StarFive's Pulse Width Modulation driver support Conor Dooley
2023-08-28  7:12   ` Hal Feng
2023-08-28  7:16     ` Krzysztof Kozlowski
2023-08-28  7:47       ` Hal Feng

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