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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id f12-20020adff44c000000b00319779ee691sm17119594wrp.28.2023.08.30.09.22.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Aug 2023 09:22:58 -0700 (PDT) Date: Wed, 30 Aug 2023 18:22:57 +0200 From: Andrew Jones To: patchwork-bot+linux-riscv@kernel.org Cc: linux-riscv@lists.infradead.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, evan@rivosinc.com, conor.dooley@microchip.com, apatel@ventanamicro.com Subject: Re: [PATCH 0/6] RISC-V: Enable cbo.zero in usermode Message-ID: <20230830-416e25b9fc6054b36bf81aab@orel> References: <20230809115516.214537-8-ajones@ventanamicro.com> <169340163447.19859.7372275191513999075.git-patchwork-notify@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <169340163447.19859.7372275191513999075.git-patchwork-notify@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230830_092302_434023_44635F94 X-CRM114-Status: GOOD ( 19.85 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Aug 30, 2023 at 01:20:34PM +0000, patchwork-bot+linux-riscv@kernel.org wrote: > Hello: > > This series was applied to riscv/linux.git (for-next) > by Palmer Dabbelt : > > On Wed, 9 Aug 2023 13:55:17 +0200 you wrote: > > In order for usermode to issue cbo.zero, it needs privilege granted to > > issue the extension instruction (patch 2) and to know that the extension > > is available and its block size (patch 3). Patch 1 could be separate from > > this series (it just fixes up some error messages), patches 4-5 convert > > the hwprobe selftest to a statically-linked, TAP test and patch 6 adds a > > new hwprobe test for the new information as well as testing CBO > > instructions can or cannot be issued as appropriate. > > > > [...] > > Here is the summary with links: > - [1/6] RISC-V: Make zicbom/zicboz errors consistent > https://git.kernel.org/riscv/c/66e02b1d6430 > - [2/6] RISC-V: Enable cbo.zero in usermode > https://git.kernel.org/riscv/c/090925374690 > - [3/6] RISC-V: hwprobe: Expose Zicboz extension and its block size > https://git.kernel.org/riscv/c/d45243f8c239 > - [4/6] RISC-V: selftests: Statically link hwprobe test > https://git.kernel.org/riscv/c/0ca410a80172 > - [5/6] RISC-V: selftests: Convert hwprobe test to kselftest API > https://git.kernel.org/riscv/c/d79a646354a9 > - [6/6] RISC-V: selftests: Add CBO tests > https://git.kernel.org/riscv/c/026645838c86 > > You are awesome, thank you! > -- > Deet-doot-dot, I am a bot. > https://korg.docs.kernel.org/patchwork/pwbot.html > > Hi Palmer, This series needs a v2. There were couple minor comments on v1, and I just found out that I broke the compiling of the nolibc vector selftest. I'll post v2 in the next few minutes. Sorry for the hassle! Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv