Re: [PATCH v3 6/6] RISC-V: selftests: Add CBO tests

[Andrew Jones <ajones@ventanamicro.com>]

On Tue, Sep 05, 2023 at 06:10:25PM +0200, Andrew Jones wrote:
> On Tue, Sep 05, 2023 at 02:36:44PM +0000, Wang, Xiao W wrote:
> > Hi,
> > 
> > > -----Original Message-----
> > > From: linux-riscv <linux-riscv-bounces@lists.infradead.org> On Behalf Of
> > > Andrew Jones
...
> > > +#define MK_CBO(fn) ((fn) << 20 | 10 << 15 | 2 << 12 | 0 << 7 | 15)
> > > +
> > > +static char mem[4096] __aligned(4096) = { [0 ... 4095] = 0xa5 };
> > > +
> > > +static bool illegal_insn;
> > > +
> > > +static void sigill_handler(int sig, siginfo_t *info, void *context)
> > > +{
> > > +	unsigned long *regs = (unsigned long *)&((ucontext_t *)context)-
> > > >uc_mcontext;
> > > +	uint32_t insn = *(uint32_t *)regs[0];
> > > +
> > > +	assert(insn == MK_CBO(regs[11]));
> > 
> > 
> > The byte order of insn should always be little endian, while the CPU may be a big-endian one, then the check might fail.
> > Maybe we can use __le32_to_cpu(insn) to convert it before the check.
> 
> Sounds good (minus the leading __, since we don't have __le32_to_cpu() in
> tools).
>

Actually, don't I also need to ensure byte order when creating the
instruction in cbo_insn() with ".4byte %2" where %2 is insn which
is MK_CBO(fn)? I presume so, which means the proper fix would be
to add a cpu_to_le32() to MK_CBO(), i.e.

 #define MK_CBO(fn) cpu_to_le32((fn) << 20 | 10 << 15 | 2 << 12 | 0 << 7 | 15)

Unless somebody tells me otherwise, then I'll do that for v4.

Thanks,
drew

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