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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id l13-20020a170906a40d00b0099bc0daf3d7sm7484299ejz.182.2023.09.05.03.36.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Sep 2023 03:36:17 -0700 (PDT) Date: Tue, 5 Sep 2023 12:36:16 +0200 From: Andrew Jones To: Haibo Xu Cc: xiaobo55x@gmail.com, Paul Walmsley , Palmer Dabbelt , Albert Ou , Paolo Bonzini , Shuah Khan , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Anup Patel , Atish Patra , Guo Ren , wchen , Greentime Hu , Sean Christopherson , Ricardo Koller , Vishal Annapurve , Vipin Sharma , Aaron Lewis , David Matlack , Mingwei Zhang , Vitaly Kuznetsov , Ackerley Tng , Lei Wang , Maxim Levitsky , Peter Gonda , Thomas Huth , Like Xu , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , David Woodhouse , Michal Luczaj , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm-riscv@lists.infradead.org Subject: Re: [PATCH v2 0/8] RISCV: Add kvm Sstc timer selftest Message-ID: <20230905-eb7998dbd945ed9dd12659ea@orel> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230905_033622_013606_F19CB986 X-CRM114-Status: GOOD ( 17.04 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi Haibo, Some of your patch summaries say 'selftest' instead of 'selftests'. Please correct those for the next version. Thanks, drew On Sat, Sep 02, 2023 at 08:59:22PM +0800, Haibo Xu wrote: > The RISC-V arch_timer selftest is used to validate Sstc timer > functionality in a guest, which sets up periodic timer interrupts > and check the basic interrupt status upon its receipt. > > This KVM selftest was ported from aarch64 arch_timer and tested > with Linux v6.5-rc5 on a Qemu riscv64 virt machine. > > --- > Changed since v1: > * Rebase to kvm-riscv/riscv_kvm_next > * Cherry-pick Sean's kselftest guest printf patch set > https://lore.kernel.org/all/20230729003643.1053367-1-seanjc@google.com/ > * Copy the entire csr.h verbatim > * Unified the function names for exception vector table setup > void vm_init_vector_tables(struct kvm_vm *vm); > void vcpu_init_vector_tables(struct kvm_vcpu *vcpu); > * Format the handler.S asm file per Andrew's comments > * Consolidate the timer test code for arm64 and riscv > based on Andrew's and Sean's suggestion > > Haibo Xu (8): > KVM: selftests: Unify the codes for guest exception handling > KVM: arm64: selftest: Split arch_timer test code > tools: riscv: Add header file csr.h > KVM: riscv: selftests: Switch to use macro from csr.h > KVM: riscv: selftests: Add exception handling support > KVM: riscv: selftests: Add guest helper to get vcpu id > KVM: riscv: selftest: Change vcpu_has_ext to a common function > KVM: riscv: selftests: Add sstc timer test > > tools/arch/riscv/include/asm/csr.h | 521 ++++++++++++++++++ > tools/testing/selftests/kvm/Makefile | 11 +- > .../selftests/kvm/aarch64/arch_timer.c | 292 +--------- > .../selftests/kvm/aarch64/debug-exceptions.c | 4 +- > .../selftests/kvm/aarch64/page_fault_test.c | 4 +- > .../testing/selftests/kvm/aarch64/vgic_irq.c | 4 +- > tools/testing/selftests/kvm/arch_timer.c | 261 +++++++++ > .../selftests/kvm/include/aarch64/processor.h | 12 +- > .../selftests/kvm/include/kvm_util_base.h | 9 + > .../selftests/kvm/include/riscv/arch_timer.h | 80 +++ > .../selftests/kvm/include/riscv/processor.h | 60 +- > .../selftests/kvm/include/timer_test.h | 58 ++ > .../selftests/kvm/include/x86_64/processor.h | 5 - > .../selftests/kvm/lib/aarch64/processor.c | 6 +- > .../selftests/kvm/lib/riscv/handlers.S | 101 ++++ > .../selftests/kvm/lib/riscv/processor.c | 86 +++ > .../selftests/kvm/lib/x86_64/processor.c | 4 +- > .../testing/selftests/kvm/riscv/arch_timer.c | 130 +++++ > .../selftests/kvm/riscv/get-reg-list.c | 14 - > tools/testing/selftests/kvm/x86_64/amx_test.c | 4 +- > .../selftests/kvm/x86_64/fix_hypercall_test.c | 4 +- > .../selftests/kvm/x86_64/hyperv_evmcs.c | 4 +- > .../selftests/kvm/x86_64/hyperv_features.c | 8 +- > .../testing/selftests/kvm/x86_64/hyperv_ipi.c | 6 +- > .../selftests/kvm/x86_64/kvm_pv_test.c | 4 +- > .../selftests/kvm/x86_64/monitor_mwait_test.c | 4 +- > .../kvm/x86_64/pmu_event_filter_test.c | 8 +- > .../smaller_maxphyaddr_emulation_test.c | 4 +- > .../selftests/kvm/x86_64/svm_int_ctl_test.c | 4 +- > .../kvm/x86_64/svm_nested_shutdown_test.c | 4 +- > .../kvm/x86_64/svm_nested_soft_inject_test.c | 4 +- > .../kvm/x86_64/ucna_injection_test.c | 8 +- > .../kvm/x86_64/userspace_msr_exit_test.c | 4 +- > .../vmx_exception_with_invalid_guest_state.c | 4 +- > .../selftests/kvm/x86_64/vmx_pmu_caps_test.c | 4 +- > .../selftests/kvm/x86_64/xapic_ipi_test.c | 4 +- > .../selftests/kvm/x86_64/xcr0_cpuid_test.c | 4 +- > .../selftests/kvm/x86_64/xen_shinfo_test.c | 4 +- > 38 files changed, 1376 insertions(+), 376 deletions(-) > create mode 100644 tools/arch/riscv/include/asm/csr.h > create mode 100644 tools/testing/selftests/kvm/arch_timer.c > create mode 100644 tools/testing/selftests/kvm/include/riscv/arch_timer.h > create mode 100644 tools/testing/selftests/kvm/include/timer_test.h > create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S > create mode 100644 tools/testing/selftests/kvm/riscv/arch_timer.c > > -- > 2.34.1 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv