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From: Andrew Jones <ajones@ventanamicro.com>
To: guoren@kernel.org
Cc: paul.walmsley@sifive.com, anup@brainfault.org,
	peterz@infradead.org,  mingo@redhat.com, will@kernel.org,
	palmer@rivosinc.com, longman@redhat.com,  boqun.feng@gmail.com,
	tglx@linutronix.de, paulmck@kernel.org, rostedt@goodmis.org,
	 rdunlap@infradead.org, catalin.marinas@arm.com,
	conor.dooley@microchip.com,  xiaoguang.xing@sophgo.com,
	bjorn@rivosinc.com, alexghiti@rivosinc.com,
	 keescook@chromium.org, greentime.hu@sifive.com,
	jszhang@kernel.org, wefu@redhat.com,  wuwei2016@iscas.ac.cn,
	leobras@redhat.com, linux-arch@vger.kernel.org,
	 linux-riscv@lists.infradead.org, linux-doc@vger.kernel.org,
	kvm@vger.kernel.org,  virtualization@lists.linux-foundation.org,
	linux-csky@vger.kernel.org, Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH V11 03/17] riscv: Use Zicbop in arch_xchg when available
Date: Thu, 14 Sep 2023 16:25:53 +0200	[thread overview]
Message-ID: <20230914-892327a75b4b86badac5de02@orel> (raw)
In-Reply-To: <20230910082911.3378782-4-guoren@kernel.org>

On Sun, Sep 10, 2023 at 04:28:57AM -0400, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
> 
> Cache-block prefetch instructions are HINTs to the hardware to
> indicate that software intends to perform a particular type of
> memory access in the near future. Enable ARCH_HAS_PREFETCHW and
> improve the arch_xchg for qspinlock xchg_tail.
> 
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> ---
>  arch/riscv/Kconfig                 | 15 +++++++++++++++
>  arch/riscv/include/asm/cmpxchg.h   |  4 +++-
>  arch/riscv/include/asm/hwcap.h     |  1 +
>  arch/riscv/include/asm/insn-def.h  |  5 +++++
>  arch/riscv/include/asm/processor.h | 13 +++++++++++++
>  arch/riscv/kernel/cpufeature.c     |  1 +
>  6 files changed, 38 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index e9ae6fa232c3..2c346fe169c1 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -617,6 +617,21 @@ config RISCV_ISA_ZICBOZ
>  
>  	   If you don't know what to do here, say Y.
>  
> +config RISCV_ISA_ZICBOP

Even if we're not concerned with looping over blocks yet, I think we
should introduce zicbop block size DT parsing at the same time we bring
zicbop support to the kernel (it's just more copy+paste from zicbom and
zicboz). It's a bit annoying that the CMO spec doesn't state that block
sizes should be the same for m/z/p. And, the fact that m/z/p are all
separate extensions leads us to needing to parse block sizes for all
three, despite the fact that in practice they'll probably be the same.

Thanks,
drew

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  parent reply	other threads:[~2023-09-14 14:26 UTC|newest]

Thread overview: 104+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-10  8:28 [PATCH V11 00/17] riscv: Add Native/Paravirt qspinlock support guoren
2023-09-10  8:28 ` [PATCH V11 01/17] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock guoren
2023-09-11 19:05   ` Leonardo Brás
2023-09-13  1:55     ` Guo Ren
2023-09-13  7:59       ` Leonardo Bras
2023-09-10  8:28 ` [PATCH V11 02/17] asm-generic: ticket-lock: Move into ticket_spinlock.h guoren
2023-09-13  8:15   ` Leonardo Bras
2023-09-10  8:28 ` [PATCH V11 03/17] riscv: Use Zicbop in arch_xchg when available guoren
2023-09-13  8:49   ` Leonardo Bras
2023-09-15 12:36     ` Guo Ren
2023-09-16  1:25       ` Leonardo Bras
2023-09-17 14:34         ` Guo Ren
2023-09-19  5:13           ` Leonardo Bras
2023-09-19  7:53             ` Guo Ren
2023-09-19 14:38               ` Leonardo Bras
2023-09-14 13:47   ` Andrew Jones
2023-09-15  8:22     ` Leonardo Bras
2023-09-15 11:07       ` Andrew Jones
2023-09-15 11:26         ` Conor Dooley
2023-09-15 12:22           ` Andrew Jones
2023-09-15 12:42             ` Conor Dooley
2023-09-16  0:05               ` Conor Dooley
2023-09-15 20:32         ` Leonardo Bras
2023-09-14 14:25   ` Andrew Jones [this message]
2023-09-14 14:47     ` Andrew Jones
2023-09-15 11:37       ` Conor Dooley
2023-09-15 12:14         ` Andrew Jones
2023-09-15 12:53           ` Conor Dooley
2023-09-10  8:28 ` [PATCH V11 04/17] locking/qspinlock: Improve xchg_tail for number of cpus >= 16k guoren
2023-09-11  2:35   ` Waiman Long
2023-09-11  3:09     ` Guo Ren
2023-09-11 13:03       ` Waiman Long
2023-09-12  1:10         ` Guo Ren
2023-09-13  8:55           ` Leonardo Bras
2023-09-13 12:52             ` Guo Ren
2023-09-13 13:06               ` Waiman Long
2023-09-14  3:45                 ` Guo Ren
2023-09-10  8:28 ` [PATCH V11 05/17] riscv: qspinlock: Add basic queued_spinlock support guoren
2023-09-13 20:28   ` Leonardo Bras
2023-09-14  4:46     ` Guo Ren
2023-09-14  9:43       ` Leonardo Bras
2023-09-15  2:10         ` Guo Ren
2023-09-15  9:08           ` Leonardo Bras
2023-09-17 15:02             ` Guo Ren
2023-09-19  5:20               ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 06/17] riscv: qspinlock: Introduce combo spinlock guoren
2023-09-10 11:06   ` Guo Ren
2023-09-13 20:37     ` Leonardo Bras
2023-09-13 20:49       ` Leonardo Bras
2023-09-14  4:49         ` Guo Ren
2023-09-14  7:17           ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 07/17] riscv: qspinlock: Introduce qspinlock param for command line guoren
2023-09-11 15:22   ` Waiman Long
2023-09-12  1:06     ` Guo Ren
2023-09-11 15:34   ` Waiman Long
2023-09-12  1:08     ` Guo Ren
2023-09-14  7:32       ` Leonardo Bras
2023-09-14 17:23         ` Waiman Long
2023-09-10  8:29 ` [PATCH V11 08/17] riscv: qspinlock: Add virt_spin_lock() support for KVM guest guoren
2023-09-14  8:02   ` Leonardo Bras
2023-09-17 15:12     ` Guo Ren
2023-09-19  5:30       ` Leonardo Bras
2023-09-19  8:04         ` Guo Ren
2023-09-19 14:40           ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 09/17] riscv: qspinlock: errata: Add ERRATA_THEAD_WRITE_ONCE fixup guoren
2023-09-14  8:32   ` Leonardo Bras
2023-09-17 15:15     ` Guo Ren
2023-09-19  5:34       ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 10/17] riscv: qspinlock: errata: Enable qspinlock for T-HEAD processors guoren
2023-09-14  9:36   ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 11/17] RISC-V: paravirt: pvqspinlock: Add paravirt qspinlock skeleton guoren
2023-09-15  5:42   ` Leonardo Bras
2023-09-17 14:58     ` Guo Ren
2023-09-19  5:43       ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 12/17] RISC-V: paravirt: pvqspinlock: Add nopvspin kernel parameter guoren
2023-09-15  6:05   ` Leonardo Bras
2023-09-17 15:03     ` Guo Ren
2023-09-19  5:44       ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 13/17] RISC-V: paravirt: pvqspinlock: Add SBI implementation guoren
2023-09-15  6:23   ` Leonardo Bras
2023-09-17 15:06     ` Guo Ren
2023-09-19  5:45       ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 14/17] RISC-V: paravirt: pvqspinlock: Add kconfig entry guoren
2023-09-15  6:25   ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 15/17] RISC-V: paravirt: pvqspinlock: Add trace point for pv_kick/wait guoren
2023-09-15  6:33   ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 16/17] RISC-V: paravirt: pvqspinlock: KVM: Add paravirt qspinlock skeleton guoren
2023-09-15  6:46   ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 17/17] RISC-V: paravirt: pvqspinlock: KVM: Implement kvm_sbi_ext_pvlock_kick_cpu() guoren
2023-09-15  6:52   ` Leonardo Bras
2023-09-10  8:58 ` [PATCH V11 00/17] riscv: Add Native/Paravirt qspinlock support Conor Dooley
2023-09-10  9:16   ` Guo Ren
2023-09-10  9:20     ` Guo Ren
2023-09-10  9:31     ` Conor Dooley
2023-09-10  9:49       ` Guo Ren
2023-09-10 19:45         ` Conor Dooley
2023-09-11  3:36           ` Guo Ren
2023-09-11 12:52             ` Conor Dooley
2023-09-12  1:33               ` Guo Ren
2023-09-12  8:07                 ` Conor Dooley
2023-09-12 10:58                   ` Guo Ren
2023-11-06 20:42 ` Leonardo Bras
2023-11-12  4:23   ` Guo Ren
2023-11-13 10:19     ` Leonardo Bras Soares Passos

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