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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id h4-20020a056000000400b00317909f9985sm6277045wrx.113.2023.09.15.23.45.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Sep 2023 23:45:51 -0700 (PDT) Date: Sat, 16 Sep 2023 08:45:51 +0200 From: Andrew Jones To: Evan Green Subject: Re: [PATCH] RISC-V: Probe misaligned access speed in parallel Message-ID: <20230916-ab31c90dd56c99d36d5fce6c@orel> References: <20230915184904.1976183-1-evan@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230915184904.1976183-1-evan@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230915_234555_261680_034CD842 X-CRM114-Status: GOOD ( 32.66 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , Albert Ou , Heiko Stuebner , Ley Foon Tan , Marc Zyngier , linux-kernel@vger.kernel.org, Palmer Dabbelt , Conor Dooley , David Laight , Palmer Dabbelt , Jisheng Zhang , Paul Walmsley , Greentime Hu , linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Sep 15, 2023 at 11:49:03AM -0700, Evan Green wrote: > Probing for misaligned access speed takes about 0.06 seconds. On a > system with 64 cores, doing this in smp_callin() means it's done > serially, extending boot time by 3.8 seconds. That's a lot of boot time. > > Instead of measuring each CPU serially, let's do the measurements on > all CPUs in parallel. If we disable preemption on all CPUs, the > jiffies stop ticking, so we can do this in stages of 1) everybody > except core 0, then 2) core 0. > > The measurement call in smp_callin() stays around, but is now > conditionalized to only run if a new CPU shows up after the round of > in-parallel measurements has run. The goal is to have the measurement > call not run during boot or suspend/resume, but only on a hotplug > addition. Yay! I had just recently tested suspend/resume and wanted to report the probe as an issue, but I hadn't gotten around to it. This patch resolves the issue, so Test-by: Andrew Jones > > Signed-off-by: Evan Green > > --- > > Jisheng, I didn't add your Tested-by tag since the patch evolved from > the one you tested. Hopefully this one brings you the same result. > > --- > arch/riscv/include/asm/cpufeature.h | 3 ++- > arch/riscv/kernel/cpufeature.c | 28 +++++++++++++++++++++++----- > arch/riscv/kernel/smpboot.c | 11 ++++++++++- > 3 files changed, 35 insertions(+), 7 deletions(-) > > diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h > index d0345bd659c9..19e7817eba10 100644 > --- a/arch/riscv/include/asm/cpufeature.h > +++ b/arch/riscv/include/asm/cpufeature.h > @@ -30,6 +30,7 @@ DECLARE_PER_CPU(long, misaligned_access_speed); > /* Per-cpu ISA extensions. */ > extern struct riscv_isainfo hart_isa[NR_CPUS]; > > -void check_unaligned_access(int cpu); > +extern bool misaligned_speed_measured; Do we need this new state or could we just always check the boot cpu's state to get the same information? per_cpu(misaligned_access_speed, 0) != RISCV_HWPROBE_MISALIGNED_UNKNOWN > +int check_unaligned_access(void *unused); > > #endif > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index 1cfbba65d11a..8eb36e1dfb95 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -42,6 +42,9 @@ struct riscv_isainfo hart_isa[NR_CPUS]; > /* Performance information */ > DEFINE_PER_CPU(long, misaligned_access_speed); > > +/* Boot-time in-parallel unaligned access measurement has occurred. */ > +bool misaligned_speed_measured; > + > /** > * riscv_isa_extension_base() - Get base extension word > * > @@ -556,8 +559,9 @@ unsigned long riscv_get_elf_hwcap(void) > return hwcap; > } > > -void check_unaligned_access(int cpu) > +int check_unaligned_access(void *unused) > { > + int cpu = smp_processor_id(); > u64 start_cycles, end_cycles; > u64 word_cycles; > u64 byte_cycles; > @@ -571,7 +575,7 @@ void check_unaligned_access(int cpu) > page = alloc_pages(GFP_NOWAIT, get_order(MISALIGNED_BUFFER_SIZE)); > if (!page) { > pr_warn("Can't alloc pages to measure memcpy performance"); > - return; > + return 0; > } > > /* Make an unaligned destination buffer. */ > @@ -643,15 +647,29 @@ void check_unaligned_access(int cpu) > > out: > __free_pages(page, get_order(MISALIGNED_BUFFER_SIZE)); > + return 0; > +} > + > +static void check_unaligned_access_nonboot_cpu(void *param) > +{ > + if (smp_processor_id() != 0) > + check_unaligned_access(param); > } > > -static int check_unaligned_access_boot_cpu(void) > +static int check_unaligned_access_all_cpus(void) > { > - check_unaligned_access(0); > + /* Check everybody except 0, who stays behind to tend jiffies. */ > + on_each_cpu(check_unaligned_access_nonboot_cpu, NULL, 1); > + > + /* Check core 0. */ > + smp_call_on_cpu(0, check_unaligned_access, NULL, true); > + > + /* Boot-time measurements are complete. */ > + misaligned_speed_measured = true; > return 0; > } > > -arch_initcall(check_unaligned_access_boot_cpu); > +arch_initcall(check_unaligned_access_all_cpus); > > #ifdef CONFIG_RISCV_ALTERNATIVE > /* > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c > index 1b8da4e40a4d..39322ae20a75 100644 > --- a/arch/riscv/kernel/smpboot.c > +++ b/arch/riscv/kernel/smpboot.c > @@ -27,6 +27,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -246,7 +247,15 @@ asmlinkage __visible void smp_callin(void) > > numa_add_cpu(curr_cpuid); > set_cpu_online(curr_cpuid, 1); > - check_unaligned_access(curr_cpuid); > + > + /* > + * Boot-time misaligned access speed measurements are done in parallel > + * in an initcall. Only measure here for hotplug. > + */ > + if (misaligned_speed_measured && > + (per_cpu(misaligned_access_speed, curr_cpuid) == RISCV_HWPROBE_MISALIGNED_UNKNOWN)) { > + check_unaligned_access(NULL); > + } > > if (has_vector()) { > if (riscv_v_setup_vsize()) > -- > 2.34.1 > Besides my reluctance to add another global variable, this looks good to me. Reviewed-by: Andrew Jones Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv