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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id v15-20020a17090606cf00b0099275c59bc9sm9433551ejb.33.2023.09.20.08.28.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 08:28:01 -0700 (PDT) Date: Wed, 20 Sep 2023 17:28:00 +0200 From: Andrew Jones To: "Xu, Haibo1" Cc: "kvm-riscv@lists.infradead.org" , "linux-riscv@lists.infradead.org" , "anup@brainfault.org" , "atishp@atishpatra.org" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "aou@eecs.berkeley.edu" Subject: Re: [PATCH] KVM: riscv: selftests: get-reg-list print_reg should never fail Message-ID: <20230920-326d0d84a57240dcebca6277@orel> References: <20230920143713.6896-2-ajones@ventanamicro.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230920_082803_811181_32B1E2A5 X-CRM114-Status: GOOD ( 22.28 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Sep 20, 2023 at 02:59:07PM +0000, Xu, Haibo1 wrote: > > -----Original Message----- > > From: Andrew Jones > > Sent: Wednesday, September 20, 2023 10:37 PM > > To: kvm-riscv@lists.infradead.org; linux-riscv@lists.infradead.org > > Cc: anup@brainfault.org; atishp@atishpatra.org; Xu, Haibo1 > > ; paul.walmsley@sifive.com; palmer@dabbelt.com; > > aou@eecs.berkeley.edu > > Subject: [PATCH] KVM: riscv: selftests: get-reg-list print_reg should never fail > > > > When outputting the "new" register list we want to print all of the new > > registers, decoding as much as possible of each of them. Also, we don't want > > to assert while listing registers with '--list'. We output > > "/* UNKNOWN */" after each new register (which we were already doing for > > some), which should be enough. > > > > Signed-off-by: Andrew Jones > > --- > > .../selftests/kvm/riscv/get-reg-list.c | 93 +++++++++---------- > > 1 file changed, 42 insertions(+), 51 deletions(-) > > > > diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c > > b/tools/testing/selftests/kvm/riscv/get-reg-list.c > > index 85907c86b835..054706538b9e 100644 > > --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c > > +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c > > @@ -112,11 +112,13 @@ void finalize_vcpu(struct kvm_vcpu *vcpu, struct > > vcpu_reg_list *c) > > } > > } > > > > -static const char *config_id_to_str(__u64 id) > > +static const char *config_id_to_str(const char *prefix, __u64 id) > > { > > /* reg_off is the offset into struct kvm_riscv_config */ > > __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CONFIG); > > > > + assert((id & KVM_REG_RISCV_TYPE_MASK) == > > KVM_REG_RISCV_CONFIG); > > + > > I think we can skip this kind of assert test since the function was reached by: > > switch (id & KVM_REG_RISCV_TYPE_MASK) { > case KVM_REG_RISCV_CONFIG: The assert is to ensure developers don't call it from anywhere else, where they may not have already confirmed the register type. And, that's why it's an 'assert' instead of a 'TEST_ASSERT'. It's for developers, not test results. Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv