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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id z11-20020a1c4c0b000000b003fc06169ab3sm1292246wmf.20.2023.09.20.01.29.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 01:29:06 -0700 (PDT) Date: Wed, 20 Sep 2023 10:29:05 +0200 From: Andrew Jones To: Xiao Wang Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, ardb@kernel.org, anup@brainfault.org, haicheng.li@intel.com, linux-riscv@lists.infradead.org, linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/2] riscv: Rearrange hwcap.h and cpufeature.h Message-ID: <20230920-645cd4e9612d83768e596514@orel> References: <20230920074653.2509631-1-xiao.w.wang@intel.com> <20230920074653.2509631-2-xiao.w.wang@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230920074653.2509631-2-xiao.w.wang@intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230920_012911_356673_8CAFA64E X-CRM114-Status: GOOD ( 11.08 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Sep 20, 2023 at 03:46:52PM +0800, Xiao Wang wrote: > Now hwcap.h and cpufeature.h are mutually including each other, and most of > the variable/API declarations in hwcap.h are implemented in cpufeature.c, > so, it's better to move them into cpufeature.h and leave only macros for > ISA extension logical IDs in hwcap.h. > > BTW, the riscv_isa_extension_mask macro is not used now, so this patch > removes it. > > Signed-off-by: Xiao Wang Suggested-by: Andrew Jones Reviewed-by: Andrew Jones Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv