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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id q24-20020a7bce98000000b003fbca942499sm834220wmj.14.2023.09.19.22.03.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 22:03:13 -0700 (PDT) Date: Wed, 20 Sep 2023 07:03:12 +0200 From: Andrew Jones To: Anup Patel Cc: Paolo Bonzini , Atish Patra , Shuah Khan , Palmer Dabbelt , Paul Walmsley , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH 1/4] RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers Message-ID: <20230920-6ef044ecc94ec729f2f6ca37@orel> References: <20230918180646.1398384-1-apatel@ventanamicro.com> <20230918180646.1398384-2-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230918180646.1398384-2-apatel@ventanamicro.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230919_220319_628105_CF8F6313 X-CRM114-Status: GOOD ( 18.29 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Sep 18, 2023 at 11:36:43PM +0530, Anup Patel wrote: > The ISA_EXT registers to enabled/disable ISA extensions for VCPU > are always available when underlying host has the corresponding > ISA extension. The copy_isa_ext_reg_indices() called by the > KVM_GET_REG_LIST API does not align with this expectation so > let's fix it. > > Fixes: 031f9efafc08 ("KVM: riscv: Add KVM_GET_REG_LIST API support") > Signed-off-by: Anup Patel > --- > arch/riscv/kvm/vcpu_onereg.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c > index 1b7e9fa265cb..e7e833ced91b 100644 > --- a/arch/riscv/kvm/vcpu_onereg.c > +++ b/arch/riscv/kvm/vcpu_onereg.c > @@ -842,7 +842,7 @@ static int copy_isa_ext_reg_indices(const struct kvm_vcpu *vcpu, > u64 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_ISA_EXT | i; > > isa_ext = kvm_isa_ext_arr[i]; > - if (!__riscv_isa_extension_available(vcpu->arch.isa, isa_ext)) > + if (!__riscv_isa_extension_available(NULL, isa_ext)) > continue; > > if (uindices) { > -- > 2.34.1 > Reviewed-by: Andrew Jones _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv