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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id hn40-20020a05600ca3a800b003fee0741b8csm4749547wmb.23.2023.09.21.05.55.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Sep 2023 05:55:19 -0700 (PDT) From: Andrew Jones To: linux-riscv@lists.infradead.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, evan@rivosinc.com, conor.dooley@microchip.com, apatel@ventanamicro.com Subject: [RFC PATCH 0/5] RISC-V: hwprobe related stuff Date: Thu, 21 Sep 2023 14:55:19 +0200 Message-ID: <20230921125518.175428-7-ajones@ventanamicro.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230921_055523_752351_5CC97CCF X-CRM114-Status: GOOD ( 12.33 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This series clarifies the hwprobe interface and introduces the first hwprobe flag. The flag basically reverses hwprobe to go from getting values for cpus to getting cpus for values. I've made the series an RFC because for the first part, the clarification, I'm not sure if the only person that needs clarification is me or not. If it's just me, then consider me clarified and we can drop it. The second part, the new flag, is an RFC, because so far the only use case is the CBO hwprobe selftest, which this series is based on and the last patch of the series applies the new hwprobe variant to it. If we don't believe other use cases, or use cases that care about having to do the probing inefficiently like the CBO test does before this series, will crop up, then the second part of this series can be dropped. Based-on: 20230918131518.56803-8-ajones@ventanamicro.com Thanks, drew Andrew Jones (5): RISC-V: hwprobe: Clarify cpus size parameter RISC-V: selftests: Replace cpu_count with cpusetsize RISC-V: hwprobe: Introduce which-cpus flag RISC-V: selftests: Add which-cpus hwprobe test RISC-V: selftests: Apply which-cpus flag to CBO hwprobe test Documentation/riscv/hwprobe.rst | 27 ++- arch/riscv/include/uapi/asm/hwprobe.h | 3 + arch/riscv/kernel/sys_riscv.c | 162 +++++++++++++++++- arch/riscv/kernel/vdso/hwprobe.c | 10 +- .../testing/selftests/riscv/hwprobe/Makefile | 5 +- tools/testing/selftests/riscv/hwprobe/cbo.c | 26 +-- .../testing/selftests/riscv/hwprobe/hwprobe.c | 2 +- .../testing/selftests/riscv/hwprobe/hwprobe.h | 2 +- .../selftests/riscv/hwprobe/which-cpus.c | 156 +++++++++++++++++ .../selftests/riscv/vector/vstate_prctl.c | 2 +- 10 files changed, 353 insertions(+), 42 deletions(-) create mode 100644 tools/testing/selftests/riscv/hwprobe/which-cpus.c -- 2.41.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv