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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id l9-20020a170906230900b00993004239a4sm8743056eja.215.2023.09.27.00.04.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Sep 2023 00:04:41 -0700 (PDT) Date: Wed, 27 Sep 2023 09:04:40 +0200 From: Andrew Jones To: Yong-Xuan Wang Cc: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org, greentime.hu@sifive.com, vincent.chen@sifive.com, tjytimi@163.com, alex@ghiti.fr, Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/3] dt-bindings: riscv: Add Svadu Entry Message-ID: <20230927-d524858b10298a4e338cde02@orel> References: <20230922085701.3164-1-yongxuan.wang@sifive.com> <20230922085701.3164-3-yongxuan.wang@sifive.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230922085701.3164-3-yongxuan.wang@sifive.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230927_000444_020356_BA055423 X-CRM114-Status: GOOD ( 16.46 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Sep 22, 2023 at 08:56:48AM +0000, Yong-Xuan Wang wrote: > Add an entry for the Svadu extension to the riscv,isa-extensions property. > > Signed-off-by: Yong-Xuan Wang > --- > Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml > index cc1f546fdbdc..b5a0aed0165b 100644 > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > @@ -147,6 +147,12 @@ properties: > ratified at commit 3f9ed34 ("Add ability to manually trigger > workflow. (#2)") of riscv-time-compare. > > + - const: svadu > + description: | > + The standard Svadu supervisor-level extension for hardware updating > + of PTE A/D bits as frozen at commit b65e07c ("move to Frozen > + state") of riscv-svadu. > + > - const: svinval > description: > The standard Svinval supervisor-level extension for fine-grained > -- > 2.17.1 > Reviewed-by: Andrew Jones _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv