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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id l40-20020a05600c1d2800b0040770ec2c19sm30176wms.10.2023.10.12.09.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 09:32:04 -0700 (PDT) Date: Thu, 12 Oct 2023 18:32:03 +0200 From: Andrew Jones To: Conor Dooley Cc: =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Rob Herring , Krzysztof Kozlowski , Albert Ou , Jonathan Corbet , Evan Green Subject: Re: [PATCH v1 01/13] riscv: fatorize hwprobe ISA extension reporting Message-ID: <20231012-8d049a0366f3333ff4a3223b@orel> References: <20231011111438.909552-1-cleger@rivosinc.com> <20231011111438.909552-2-cleger@rivosinc.com> <20231012-matriarch-lunar-819c1d2d7996@spud> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231012-matriarch-lunar-819c1d2d7996@spud> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231012_093209_668980_1F472230 X-CRM114-Status: GOOD ( 23.17 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Oct 12, 2023 at 02:53:43PM +0100, Conor Dooley wrote: > Drew, > = > On Wed, Oct 11, 2023 at 01:14:26PM +0200, Cl=E9ment L=E9ger wrote: > > Factorize ISA extension reporting by using a macro rather than > > copy/pasting extension names. This will allow adding new extensions more > > easily. > > = > > Signed-off-by: Cl=E9ment L=E9ger > > --- > > arch/riscv/kernel/sys_riscv.c | 26 ++++++++++++-------------- > > 1 file changed, 12 insertions(+), 14 deletions(-) > > = > > diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_risc= v.c > > index 473159b5f303..5ce593ce07a4 100644 > > --- a/arch/riscv/kernel/sys_riscv.c > > +++ b/arch/riscv/kernel/sys_riscv.c > > @@ -145,20 +145,18 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe= *pair, > > for_each_cpu(cpu, cpus) { > = > We were gonna add a comment here about when it is and is not safe to use > riscv_isa_extension_available() IIRC. Did that ever end up in a patch? Yup, it's in [1]. But that series may be hung up on spec stuff, so maybe it'd be better for Cl=E9ment to integrate it. And, it appears we definitely need this macro, because it has now been suggested by three different people :-) (I later saw Samuel was first[2], but I hadn't seen his before submitting mine, otherwise I would have given him the credit.) [1] https://lore.kernel.org/all/20230918131518.56803-11-ajones@ventanamicro= .com/ [2] https://lore.kernel.org/all/20230712084134.1648008-4-sameo@rivosinc.com/ Thanks, drew > = > > struct riscv_isainfo *isainfo =3D &hart_isa[cpu]; > > = > > - if (riscv_isa_extension_available(isainfo->isa, ZBA)) > > - pair->value |=3D RISCV_HWPROBE_EXT_ZBA; > > - else > > - missing |=3D RISCV_HWPROBE_EXT_ZBA; > > - > > - if (riscv_isa_extension_available(isainfo->isa, ZBB)) > > - pair->value |=3D RISCV_HWPROBE_EXT_ZBB; > > - else > > - missing |=3D RISCV_HWPROBE_EXT_ZBB; > > - > > - if (riscv_isa_extension_available(isainfo->isa, ZBS)) > > - pair->value |=3D RISCV_HWPROBE_EXT_ZBS; > > - else > > - missing |=3D RISCV_HWPROBE_EXT_ZBS; > > +#define CHECK_ISA_EXT(__ext) \ > > + do { \ > > + if (riscv_isa_extension_available(isainfo->isa, __ext)) \ > > + pair->value |=3D RISCV_HWPROBE_EXT_##__ext; \ > > + else \ > > + missing |=3D RISCV_HWPROBE_EXT_##__ext; \ > > + } while (false) \ > > + > > + CHECK_ISA_EXT(ZBA); > > + CHECK_ISA_EXT(ZBB); > > + CHECK_ISA_EXT(ZBS); > > +#undef CHECK_ISA_EXT > > } > > = > > /* Now turn off reporting features if any CPU is missing it. */ > > -- = > > 2.42.0 > > = _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv