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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Oct 26, 2023 at 02:36:44AM +0800, Jerry Shih wrote: > +static struct skcipher_alg riscv64_chacha_alg_zvkb[] = { { > + .base = { > + .cra_name = "chacha20", > + .cra_driver_name = "chacha20-riscv64-zvkb", > + .cra_priority = 300, > + .cra_blocksize = 1, > + .cra_ctxsize = sizeof(struct chacha_ctx), > + .cra_module = THIS_MODULE, > + }, > + .min_keysize = CHACHA_KEY_SIZE, > + .max_keysize = CHACHA_KEY_SIZE, > + .ivsize = CHACHA_IV_SIZE, > + .chunksize = CHACHA_BLOCK_SIZE, > + .walksize = CHACHA_BLOCK_SIZE * 4, > + .setkey = chacha20_setkey, > + .encrypt = chacha20_encrypt, > + .decrypt = chacha20_encrypt, > +} }; > + > +static inline bool check_chacha20_ext(void) > +{ > + return riscv_isa_extension_available(NULL, ZVKB) && > + riscv_vector_vlen() >= 128; > +} > + > +static int __init riscv64_chacha_mod_init(void) > +{ > + if (check_chacha20_ext()) > + return crypto_register_skciphers( > + riscv64_chacha_alg_zvkb, > + ARRAY_SIZE(riscv64_chacha_alg_zvkb)); > + > + return -ENODEV; > +} > + > +static void __exit riscv64_chacha_mod_fini(void) > +{ > + if (check_chacha20_ext()) > + crypto_unregister_skciphers( > + riscv64_chacha_alg_zvkb, > + ARRAY_SIZE(riscv64_chacha_alg_zvkb)); > +} When there's just one algorithm being registered/unregistered, crypto_register_skcipher() and crypto_unregister_skcipher() can be used. > +# - RV64I > +# - RISC-V Vector ('V') with VLEN >= 128 > +# - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb') > +# - RISC-V Zicclsm(Main memory supports misaligned loads/stores) How is the presence of the Zicclsm extension guaranteed? - Eric _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv