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From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	jszhang@kernel.org, tglx@linutronix.de,
	Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org,
	tobias.schaffner@siemens.com, Arnd Bergmann <arnd@arndb.de>
Subject: Re: [PATCH RT v2 0/3] riscv: add PREEMPT_RT support
Date: Fri, 3 Nov 2023 09:17:11 +0100	[thread overview]
Message-ID: <20231103081711.Vp2nQhf6@linutronix.de> (raw)
In-Reply-To: <mhng-e4437055-dc5b-4105-859c-02297f54d0bd@palmer-ri-x1c9>

On 2023-11-02 14:37:05 [-0700], Palmer Dabbelt wrote:
> On Thu, 02 Nov 2023 08:54:23 PDT (-0700), bigeasy@linutronix.de wrote:
> > On 2023-11-02 12:31:15 [+0000], Conor Dooley wrote:
> > > [    1.130384] BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
> > > [    1.130418]
> > > [    1.130414] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 0, name: swapper/1
> > > [    1.130971] [<ffffffff80267d78>] __alloc_pages+0xac/0x1be
> > > [    1.130978]   alloc_workqueue+0x96/0x6de
> > > [    1.131005] [<ffffffff8000412a>] check_unaligned_access+0x34/0x336
> > > [    1.131010]   kmem_cache_init_late+0x1c/0x36
> > > [    1.131038] [<ffffffff80004660>] check_unaligned_access_nonboot_cpu+0x12/0x1a
> > > [    1.131046]   start_kernel+0x204/0x7e6
> > > [    1.131082] irq event stamp: 822
> > > [    1.131071] [<ffffffff800fcba0>] __flush_smp_call_function_queue+0x1de/0x790
> > > [    1.131093] hardirqs last  enabled at (821): [<ffffffff80bd75b0>] default_idle_call+0xfa/0x152
> > > [    1.131111] [<ffffffff800fd3a0>] generic_smp_call_function_single_interrupt+0xe/0x1a
> > > [    1.131124] hardirqs last disabled at (822): [<ffffffff80bd52a0>] do_irq+0x16/0xa6
> > 
> > Without the patch check_unaligned_access_boot_cpu() ->
> > check_unaligned_access() is okay. The SMP/IPI variant (the patch imho)
> > is bad. There must be no memory allocation from IRQ-off region - the
> 
> Ya, sorry I didn't catch it.  I'm just going to drop Evan's patch, it'd
> missed the batch I was going to send tomorrow anyway.

The bring up of the secondary CPUs still has the memory in IRQ-off
path, only the primary CPU is fine.

Sebastian

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  reply	other threads:[~2023-11-03  8:17 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-31 14:35 [PATCH RT v2 0/3] riscv: add PREEMPT_RT support Jisheng Zhang
2023-10-31 14:35 ` [PATCH RT v2 1/2] riscv: add PREEMPT_AUTO support Jisheng Zhang
2023-10-31 14:35 ` [PATCH RT v2 2/2] riscv: allow to enable RT Jisheng Zhang
2023-10-31 15:32 ` [PATCH RT v2 0/3] riscv: add PREEMPT_RT support Sebastian Andrzej Siewior
2023-10-31 15:49   ` Jisheng Zhang
2023-10-31 16:44     ` Sebastian Andrzej Siewior
2023-11-01 11:41       ` Jisheng Zhang
2023-11-02 12:31         ` Conor Dooley
2023-11-02 15:54           ` Sebastian Andrzej Siewior
2023-11-02 17:03             ` Jisheng Zhang
2023-11-02 21:37             ` Palmer Dabbelt
2023-11-03  8:17               ` Sebastian Andrzej Siewior [this message]
2023-11-03  8:14             ` Conor Dooley
2023-11-03  8:24               ` Sebastian Andrzej Siewior
2023-11-03 17:19                 ` Evan Green
2023-11-03 17:39                   ` Sebastian Andrzej Siewior
2023-11-03 18:22                     ` Evan Green
2023-11-06  8:53                       ` Sebastian Andrzej Siewior
2023-11-06 16:25                         ` Evan Green
2023-11-06 21:58 ` Palmer Dabbelt
2023-11-10 15:37   ` Sebastian Andrzej Siewior

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