From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7993DC07CA9 for ; Tue, 28 Nov 2023 14:46:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hnEzG+7tA8fATUNcglG3MqmvI4OvRVVv/Z60GFmonCM=; b=wsueTrtv6yYuHJ /tj1Lx8R5jwuDHNASXNNU3d7UBjX7LERfWh72qeg5YBfm9jsm57Cq+rAz5w7OIxXPltw+DnlR9RK2 nUJKkmVdjncrtselMA6Chb2wAvze7h1y0nLbuU5leBJ0cwFo0yHp6OEMYRFpHBHTopNZjcQTldhS8 6HR+CApRq60vthzAkDuU6sHO2SDbLGYAOEo+dCkw/TkO9+SCi4jv6QzUeyMXZK6k9KC0E+lZKAX8U D4lhArsiIZ/TZXNB0/Lq0HAEVdBr5WnJfWsbVJ42Lcw3tj9D3bqGn0UTYGWR/SBUO2DjwacOi+hdl wMEVHUyz00ruW9uz5abQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r7zM2-005Xct-2r; Tue, 28 Nov 2023 14:46:26 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r7zLz-005XbX-2W; Tue, 28 Nov 2023 14:46:25 +0000 Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4Sfld50B5Bz6GD2C; Tue, 28 Nov 2023 22:46:01 +0800 (CST) Received: from lhrpeml500005.china.huawei.com (unknown [7.191.163.240]) by mail.maildlp.com (Postfix) with ESMTPS id EDB31140CB9; Tue, 28 Nov 2023 22:46:17 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 28 Nov 2023 14:46:17 +0000 Date: Tue, 28 Nov 2023 14:46:16 +0000 From: Jonathan Cameron To: Russell King CC: , , , , , , , , , , , , , Salil Mehta , Jean-Philippe Brucker , , , James Morse , Huacai Chen , WANG Xuerui , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , "Rafael J. Wysocki" , Len Brown , Paul Walmsley , Palmer Dabbelt , Albert Ou Subject: Re: [PATCH RFC 05/22] ACPI: Move ACPI_HOTPLUG_CPU to be disabled on arm64 and riscv Message-ID: <20231128144616.00006ed0@Huawei.com> In-Reply-To: References: Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml500006.china.huawei.com (7.191.161.198) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231128_064623_957961_CE3A4414 X-CRM114-Status: GOOD ( 15.14 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, 07 Nov 2023 10:29:44 +0000 Russell King wrote: > From: James Morse > > Neither arm64 nor riscv support physical hotadd of CPUs that were not > present at boot. For arm64 much of the platform description is in static > tables which do not have update methods. arm64 does support HOTPLUG_CPU, > which is backed by a firmware interface to turn CPUs on and off. > > acpi_processor_hotadd_init() and acpi_processor_remove() are for adding > and removing CPUs that were not present at boot. arm64 systems that do this > are not supported as there is currently insufficient information in the > platform description. (e.g. did the GICR get removed too?) > > arm64 currently relies on the MADT enabled flag check in map_gicc_mpidr() > to prevent CPUs that were not described as present at boot from being > added to the system. Similarly, riscv relies on the same check in > map_rintc_hartid(). Both architectures also rely on the weak 'always fails' > definitions of acpi_map_cpu() and arch_register_cpu(). > > Subsequent changes will redefine ACPI_HOTPLUG_CPU as making possible > CPUs present. Neither arm64 nor riscv support this. > > Disable ACPI_HOTPLUG_CPU for arm64 and riscv by removing 'default y' and > selecting it on the other three ACPI architectures. This allows the weak > definitions of some symbols to be removed. > > Signed-off-by: James Morse > Signed-off-by: Russell King (Oracle) Reviewed-by: Jonathan Cameron _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv