* [PATCH v5 1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
2023-11-24 7:09 [PATCH v5 0/5] RISC-V SBI debug console extension support Anup Patel
@ 2023-11-24 7:09 ` Anup Patel
2023-11-24 7:09 ` [PATCH v5 2/5] RISC-V: Add SBI debug console helper routines Anup Patel
` (4 subsequent siblings)
5 siblings, 0 replies; 14+ messages in thread
From: Anup Patel @ 2023-11-24 7:09 UTC (permalink / raw)
To: Palmer Dabbelt, Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby
Cc: Conor Dooley, Andrew Jones, linux-riscv, linux-serial,
linuxppc-dev, linux-kernel, Anup Patel
The functions sbi_console_putchar() and sbi_console_getchar() are
not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
stub of these functions to avoid "#ifdef" on user side.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/include/asm/sbi.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 0892f4421bc4..66f3933c14f6 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -271,8 +271,13 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
unsigned long arg3, unsigned long arg4,
unsigned long arg5);
+#ifdef CONFIG_RISCV_SBI_V01
void sbi_console_putchar(int ch);
int sbi_console_getchar(void);
+#else
+static inline void sbi_console_putchar(int ch) { }
+static inline int sbi_console_getchar(void) { return -ENOENT; }
+#endif
long sbi_get_mvendorid(void);
long sbi_get_marchid(void);
long sbi_get_mimpid(void);
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v5 2/5] RISC-V: Add SBI debug console helper routines
2023-11-24 7:09 [PATCH v5 0/5] RISC-V SBI debug console extension support Anup Patel
2023-11-24 7:09 ` [PATCH v5 1/5] RISC-V: Add stubs for sbi_console_putchar/getchar() Anup Patel
@ 2023-11-24 7:09 ` Anup Patel
2023-11-24 7:09 ` [PATCH v5 3/5] tty/serial: Add RISC-V SBI debug console based earlycon Anup Patel
` (3 subsequent siblings)
5 siblings, 0 replies; 14+ messages in thread
From: Anup Patel @ 2023-11-24 7:09 UTC (permalink / raw)
To: Palmer Dabbelt, Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby
Cc: Conor Dooley, Andrew Jones, linux-riscv, linux-serial,
linuxppc-dev, linux-kernel, Anup Patel
Let us provide SBI debug console helper routines which can be
shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/include/asm/sbi.h | 5 +++
arch/riscv/kernel/sbi.c | 66 ++++++++++++++++++++++++++++++++++++
2 files changed, 71 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 66f3933c14f6..9eef25308d53 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -334,6 +334,11 @@ static inline unsigned long sbi_mk_version(unsigned long major,
}
int sbi_err_map_linux_errno(int err);
+
+extern bool sbi_debug_console_available;
+int sbi_debug_console_write(const char *bytes, unsigned int num_bytes);
+int sbi_debug_console_read(char *bytes, unsigned int num_bytes);
+
#else /* CONFIG_RISCV_SBI */
static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return -1; }
static inline void sbi_init(void) {}
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 5a62ed1da453..e66e0999a800 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -7,6 +7,7 @@
#include <linux/bits.h>
#include <linux/init.h>
+#include <linux/mm.h>
#include <linux/pm.h>
#include <linux/reboot.h>
#include <asm/sbi.h>
@@ -571,6 +572,66 @@ long sbi_get_mimpid(void)
}
EXPORT_SYMBOL_GPL(sbi_get_mimpid);
+bool sbi_debug_console_available;
+
+int sbi_debug_console_write(const char *bytes, unsigned int num_bytes)
+{
+ phys_addr_t base_addr;
+ struct sbiret ret;
+
+ if (!sbi_debug_console_available)
+ return -EOPNOTSUPP;
+
+ if (is_vmalloc_addr(bytes))
+ base_addr = page_to_phys(vmalloc_to_page(bytes)) +
+ offset_in_page(bytes);
+ else
+ base_addr = __pa(bytes);
+ if (PAGE_SIZE < (offset_in_page(bytes) + num_bytes))
+ num_bytes = PAGE_SIZE - offset_in_page(bytes);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ num_bytes, lower_32_bits(base_addr),
+ upper_32_bits(base_addr), 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ num_bytes, base_addr, 0, 0, 0, 0);
+
+ if (ret.error == SBI_ERR_FAILURE)
+ return -EIO;
+ return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
+}
+
+int sbi_debug_console_read(char *bytes, unsigned int num_bytes)
+{
+ phys_addr_t base_addr;
+ struct sbiret ret;
+
+ if (!sbi_debug_console_available)
+ return -EOPNOTSUPP;
+
+ if (is_vmalloc_addr(bytes))
+ base_addr = page_to_phys(vmalloc_to_page(bytes)) +
+ offset_in_page(bytes);
+ else
+ base_addr = __pa(bytes);
+ if (PAGE_SIZE < (offset_in_page(bytes) + num_bytes))
+ num_bytes = PAGE_SIZE - offset_in_page(bytes);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ num_bytes, lower_32_bits(base_addr),
+ upper_32_bits(base_addr), 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ num_bytes, base_addr, 0, 0, 0, 0);
+
+ if (ret.error == SBI_ERR_FAILURE)
+ return -EIO;
+ return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
+}
+
void __init sbi_init(void)
{
int ret;
@@ -612,6 +673,11 @@ void __init sbi_init(void)
sbi_srst_reboot_nb.priority = 192;
register_restart_handler(&sbi_srst_reboot_nb);
}
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ pr_info("SBI DBCN extension detected\n");
+ sbi_debug_console_available = true;
+ }
} else {
__sbi_set_timer = __sbi_set_timer_v01;
__sbi_send_ipi = __sbi_send_ipi_v01;
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v5 3/5] tty/serial: Add RISC-V SBI debug console based earlycon
2023-11-24 7:09 [PATCH v5 0/5] RISC-V SBI debug console extension support Anup Patel
2023-11-24 7:09 ` [PATCH v5 1/5] RISC-V: Add stubs for sbi_console_putchar/getchar() Anup Patel
2023-11-24 7:09 ` [PATCH v5 2/5] RISC-V: Add SBI debug console helper routines Anup Patel
@ 2023-11-24 7:09 ` Anup Patel
2023-11-28 19:21 ` Greg Kroah-Hartman
2023-11-24 7:09 ` [PATCH v5 4/5] tty: Add SBI debug console support to HVC SBI driver Anup Patel
` (2 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Anup Patel @ 2023-11-24 7:09 UTC (permalink / raw)
To: Palmer Dabbelt, Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby
Cc: Conor Dooley, Andrew Jones, linux-riscv, linux-serial,
linuxppc-dev, linux-kernel, Anup Patel
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 27 ++++++++++++++++++++++---
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 732c893c8d16..1f2594b8ab9d 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..0162155f0c83 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -15,17 +15,38 @@ static void sbi_putc(struct uart_port *port, unsigned char c)
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ int ret;
+
+ while (n) {
+ ret = sbi_debug_console_write(s, n);
+ if (ret < 0)
+ break;
+
+ s += ret;
+ n -= ret;
+ }
+}
+
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
+ if (sbi_debug_console_available)
+ device->con->write = sbi_dbcn_console_write;
+ else if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
+ device->con->write = sbi_0_1_console_write;
+ else
+ return -ENODEV;
+
return 0;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v5 3/5] tty/serial: Add RISC-V SBI debug console based earlycon
2023-11-24 7:09 ` [PATCH v5 3/5] tty/serial: Add RISC-V SBI debug console based earlycon Anup Patel
@ 2023-11-28 19:21 ` Greg Kroah-Hartman
0 siblings, 0 replies; 14+ messages in thread
From: Greg Kroah-Hartman @ 2023-11-28 19:21 UTC (permalink / raw)
To: Anup Patel
Cc: Palmer Dabbelt, Paul Walmsley, Jiri Slaby, Conor Dooley,
Andrew Jones, linux-riscv, linux-serial, linuxppc-dev,
linux-kernel
On Fri, Nov 24, 2023 at 12:39:03PM +0530, Anup Patel wrote:
> We extend the existing RISC-V SBI earlycon support to use the new
> RISC-V SBI debug console extension.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> drivers/tty/serial/Kconfig | 2 +-
> drivers/tty/serial/earlycon-riscv-sbi.c | 27 ++++++++++++++++++++++---
> 2 files changed, 25 insertions(+), 4 deletions(-)
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v5 4/5] tty: Add SBI debug console support to HVC SBI driver
2023-11-24 7:09 [PATCH v5 0/5] RISC-V SBI debug console extension support Anup Patel
` (2 preceding siblings ...)
2023-11-24 7:09 ` [PATCH v5 3/5] tty/serial: Add RISC-V SBI debug console based earlycon Anup Patel
@ 2023-11-24 7:09 ` Anup Patel
2023-11-24 17:31 ` Andrew Jones
2023-11-28 19:21 ` Greg Kroah-Hartman
2023-11-24 7:09 ` [PATCH v5 5/5] RISC-V: Enable SBI based earlycon support Anup Patel
2024-01-11 14:50 ` [PATCH v5 0/5] RISC-V SBI debug console extension support patchwork-bot+linux-riscv
5 siblings, 2 replies; 14+ messages in thread
From: Anup Patel @ 2023-11-24 7:09 UTC (permalink / raw)
To: Palmer Dabbelt, Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby
Cc: Conor Dooley, Andrew Jones, linux-riscv, linux-serial,
linuxppc-dev, linux-kernel, Atish Patra, Anup Patel
From: Atish Patra <atishp@rivosinc.com>
RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.
Extend the HVC SBI driver to support it.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 37 ++++++++++++++++++++++++++-------
2 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 4f9264d005c0..6e05c5c7bca1 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
config HVC_RISCV_SBI
bool "RISC-V SBI console support"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select HVC_DRIVER
help
This enables support for console output via RISC-V SBI calls, which
diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index 31f53fa77e4a..2f3571f17ecd 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -39,21 +39,44 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int count)
return i;
}
-static const struct hv_ops hvc_sbi_ops = {
+static const struct hv_ops hvc_sbi_v01_ops = {
.get_chars = hvc_sbi_tty_get,
.put_chars = hvc_sbi_tty_put,
};
-static int __init hvc_sbi_init(void)
+static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
{
- return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
+ return sbi_debug_console_write(buf, count);
}
-device_initcall(hvc_sbi_init);
-static int __init hvc_sbi_console_init(void)
+static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
{
- hvc_instantiate(0, 0, &hvc_sbi_ops);
+ return sbi_debug_console_read(buf, count);
+}
+
+static const struct hv_ops hvc_sbi_dbcn_ops = {
+ .put_chars = hvc_sbi_dbcn_tty_put,
+ .get_chars = hvc_sbi_dbcn_tty_get,
+};
+
+static int __init hvc_sbi_init(void)
+{
+ int err;
+
+ if (sbi_debug_console_available) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
+ } else if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
+ } else {
+ return -ENODEV;
+ }
return 0;
}
-console_initcall(hvc_sbi_console_init);
+device_initcall(hvc_sbi_init);
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v5 4/5] tty: Add SBI debug console support to HVC SBI driver
2023-11-24 7:09 ` [PATCH v5 4/5] tty: Add SBI debug console support to HVC SBI driver Anup Patel
@ 2023-11-24 17:31 ` Andrew Jones
2023-11-28 19:21 ` Greg Kroah-Hartman
1 sibling, 0 replies; 14+ messages in thread
From: Andrew Jones @ 2023-11-24 17:31 UTC (permalink / raw)
To: Anup Patel
Cc: Palmer Dabbelt, Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby,
Conor Dooley, linux-riscv, linux-serial, linuxppc-dev,
linux-kernel, Atish Patra
On Fri, Nov 24, 2023 at 12:39:04PM +0530, Anup Patel wrote:
> From: Atish Patra <atishp@rivosinc.com>
>
> RISC-V SBI specification supports advanced debug console
> support via SBI DBCN extension.
>
> Extend the HVC SBI driver to support it.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> drivers/tty/hvc/Kconfig | 2 +-
> drivers/tty/hvc/hvc_riscv_sbi.c | 37 ++++++++++++++++++++++++++-------
> 2 files changed, 31 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
> index 4f9264d005c0..6e05c5c7bca1 100644
> --- a/drivers/tty/hvc/Kconfig
> +++ b/drivers/tty/hvc/Kconfig
> @@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
>
> config HVC_RISCV_SBI
> bool "RISC-V SBI console support"
> - depends on RISCV_SBI_V01
> + depends on RISCV_SBI
> select HVC_DRIVER
> help
> This enables support for console output via RISC-V SBI calls, which
> diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
> index 31f53fa77e4a..2f3571f17ecd 100644
> --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> @@ -39,21 +39,44 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int count)
> return i;
> }
>
> -static const struct hv_ops hvc_sbi_ops = {
> +static const struct hv_ops hvc_sbi_v01_ops = {
> .get_chars = hvc_sbi_tty_get,
> .put_chars = hvc_sbi_tty_put,
> };
>
> -static int __init hvc_sbi_init(void)
> +static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
> {
> - return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
> + return sbi_debug_console_write(buf, count);
> }
> -device_initcall(hvc_sbi_init);
>
> -static int __init hvc_sbi_console_init(void)
> +static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
> {
> - hvc_instantiate(0, 0, &hvc_sbi_ops);
> + return sbi_debug_console_read(buf, count);
> +}
> +
> +static const struct hv_ops hvc_sbi_dbcn_ops = {
> + .put_chars = hvc_sbi_dbcn_tty_put,
> + .get_chars = hvc_sbi_dbcn_tty_get,
> +};
> +
> +static int __init hvc_sbi_init(void)
> +{
> + int err;
> +
> + if (sbi_debug_console_available) {
> + err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 256));
> + if (err)
> + return err;
> + hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
> + } else if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) {
> + err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops, 256));
> + if (err)
> + return err;
> + hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
> + } else {
> + return -ENODEV;
> + }
>
> return 0;
> }
> -console_initcall(hvc_sbi_console_init);
> +device_initcall(hvc_sbi_init);
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 4/5] tty: Add SBI debug console support to HVC SBI driver
2023-11-24 7:09 ` [PATCH v5 4/5] tty: Add SBI debug console support to HVC SBI driver Anup Patel
2023-11-24 17:31 ` Andrew Jones
@ 2023-11-28 19:21 ` Greg Kroah-Hartman
1 sibling, 0 replies; 14+ messages in thread
From: Greg Kroah-Hartman @ 2023-11-28 19:21 UTC (permalink / raw)
To: Anup Patel
Cc: Palmer Dabbelt, Paul Walmsley, Jiri Slaby, Conor Dooley,
Andrew Jones, linux-riscv, linux-serial, linuxppc-dev,
linux-kernel, Atish Patra
On Fri, Nov 24, 2023 at 12:39:04PM +0530, Anup Patel wrote:
> From: Atish Patra <atishp@rivosinc.com>
>
> RISC-V SBI specification supports advanced debug console
> support via SBI DBCN extension.
>
> Extend the HVC SBI driver to support it.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> drivers/tty/hvc/Kconfig | 2 +-
> drivers/tty/hvc/hvc_riscv_sbi.c | 37 ++++++++++++++++++++++++++-------
> 2 files changed, 31 insertions(+), 8 deletions(-)
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v5 5/5] RISC-V: Enable SBI based earlycon support
2023-11-24 7:09 [PATCH v5 0/5] RISC-V SBI debug console extension support Anup Patel
` (3 preceding siblings ...)
2023-11-24 7:09 ` [PATCH v5 4/5] tty: Add SBI debug console support to HVC SBI driver Anup Patel
@ 2023-11-24 7:09 ` Anup Patel
2024-01-11 14:50 ` [PATCH v5 0/5] RISC-V SBI debug console extension support patchwork-bot+linux-riscv
5 siblings, 0 replies; 14+ messages in thread
From: Anup Patel @ 2023-11-24 7:09 UTC (permalink / raw)
To: Palmer Dabbelt, Paul Walmsley, Greg Kroah-Hartman, Jiri Slaby
Cc: Conor Dooley, Andrew Jones, linux-riscv, linux-serial,
linuxppc-dev, linux-kernel, Anup Patel
Let us enable SBI based earlycon support in defconfig for both RV32
and RV64 so that "earlycon=sbi" can be used again.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 905881282a7c..eaf34e871e30 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v5 0/5] RISC-V SBI debug console extension support
2023-11-24 7:09 [PATCH v5 0/5] RISC-V SBI debug console extension support Anup Patel
` (4 preceding siblings ...)
2023-11-24 7:09 ` [PATCH v5 5/5] RISC-V: Enable SBI based earlycon support Anup Patel
@ 2024-01-11 14:50 ` patchwork-bot+linux-riscv
2024-01-12 18:30 ` Palmer Dabbelt
5 siblings, 1 reply; 14+ messages in thread
From: patchwork-bot+linux-riscv @ 2024-01-11 14:50 UTC (permalink / raw)
To: Anup Patel
Cc: linux-riscv, palmer, paul.walmsley, gregkh, jirislaby, conor,
ajones, linux-serial, linuxppc-dev, linux-kernel
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Fri, 24 Nov 2023 12:39:00 +0530 you wrote:
> The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines
> SBI debug console (DBCN) extension which replaces the legacy SBI v0.1
> functions sbi_console_putchar() and sbi_console_getchar().
> (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases)
>
> This series adds support for SBI debug console (DBCN) extension in
> Linux RISC-V.
>
> [...]
Here is the summary with links:
- [v5,1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
https://git.kernel.org/riscv/c/f503b167b660
- [v5,2/5] RISC-V: Add SBI debug console helper routines
https://git.kernel.org/riscv/c/f43fabf444ca
- [v5,3/5] tty/serial: Add RISC-V SBI debug console based earlycon
https://git.kernel.org/riscv/c/c77bf3607a0f
- [v5,4/5] tty: Add SBI debug console support to HVC SBI driver
https://git.kernel.org/riscv/c/88ead68e764c
- [v5,5/5] RISC-V: Enable SBI based earlycon support
https://git.kernel.org/riscv/c/50942ad6ddb5
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 0/5] RISC-V SBI debug console extension support
2024-01-11 14:50 ` [PATCH v5 0/5] RISC-V SBI debug console extension support patchwork-bot+linux-riscv
@ 2024-01-12 18:30 ` Palmer Dabbelt
2024-01-19 10:09 ` Anup Patel
0 siblings, 1 reply; 14+ messages in thread
From: Palmer Dabbelt @ 2024-01-12 18:30 UTC (permalink / raw)
To: apatel, Greg KH, nathan
Cc: linux-riscv, Paul Walmsley, jirislaby, Conor Dooley, ajones,
linux-serial, linuxppc-dev, linux-kernel
On Thu, 11 Jan 2024 06:50:37 PST (-0800), patchwork-bot+linux-riscv@kernel.org wrote:
> Hello:
>
> This series was applied to riscv/linux.git (for-next)
> by Palmer Dabbelt <palmer@rivosinc.com>:
>
> On Fri, 24 Nov 2023 12:39:00 +0530 you wrote:
>> The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines
>> SBI debug console (DBCN) extension which replaces the legacy SBI v0.1
>> functions sbi_console_putchar() and sbi_console_getchar().
>> (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases)
>>
>> This series adds support for SBI debug console (DBCN) extension in
>> Linux RISC-V.
>>
>> [...]
>
> Here is the summary with links:
> - [v5,1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
> https://git.kernel.org/riscv/c/f503b167b660
> - [v5,2/5] RISC-V: Add SBI debug console helper routines
> https://git.kernel.org/riscv/c/f43fabf444ca
> - [v5,3/5] tty/serial: Add RISC-V SBI debug console based earlycon
> https://git.kernel.org/riscv/c/c77bf3607a0f
> - [v5,4/5] tty: Add SBI debug console support to HVC SBI driver
> https://git.kernel.org/riscv/c/88ead68e764c
> - [v5,5/5] RISC-V: Enable SBI based earlycon support
> https://git.kernel.org/riscv/c/50942ad6ddb5
>
> You are awesome, thank you!
Nathan points out that this has some semantic conflicts with a patch in
Greg's TTY tree: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?id=f32fcbedbe9290565e4eac3fd7c4c451d5478787
So I think the best bet is to wait on Greg's patch to land in Linus'
tree, and then base a v6 of this patch set on that merged patch. I'm
going to drop this one from for-next.
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v5 0/5] RISC-V SBI debug console extension support
2024-01-12 18:30 ` Palmer Dabbelt
@ 2024-01-19 10:09 ` Anup Patel
2024-01-19 21:59 ` Palmer Dabbelt
0 siblings, 1 reply; 14+ messages in thread
From: Anup Patel @ 2024-01-19 10:09 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Greg KH, nathan, linux-riscv, Paul Walmsley, jirislaby,
Conor Dooley, ajones, linux-serial, linuxppc-dev, linux-kernel
On Sat, Jan 13, 2024 at 12:00 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> On Thu, 11 Jan 2024 06:50:37 PST (-0800), patchwork-bot+linux-riscv@kernel.org wrote:
> > Hello:
> >
> > This series was applied to riscv/linux.git (for-next)
> > by Palmer Dabbelt <palmer@rivosinc.com>:
> >
> > On Fri, 24 Nov 2023 12:39:00 +0530 you wrote:
> >> The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines
> >> SBI debug console (DBCN) extension which replaces the legacy SBI v0.1
> >> functions sbi_console_putchar() and sbi_console_getchar().
> >> (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases)
> >>
> >> This series adds support for SBI debug console (DBCN) extension in
> >> Linux RISC-V.
> >>
> >> [...]
> >
> > Here is the summary with links:
> > - [v5,1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
> > https://git.kernel.org/riscv/c/f503b167b660
> > - [v5,2/5] RISC-V: Add SBI debug console helper routines
> > https://git.kernel.org/riscv/c/f43fabf444ca
> > - [v5,3/5] tty/serial: Add RISC-V SBI debug console based earlycon
> > https://git.kernel.org/riscv/c/c77bf3607a0f
> > - [v5,4/5] tty: Add SBI debug console support to HVC SBI driver
> > https://git.kernel.org/riscv/c/88ead68e764c
> > - [v5,5/5] RISC-V: Enable SBI based earlycon support
> > https://git.kernel.org/riscv/c/50942ad6ddb5
> >
> > You are awesome, thank you!
>
> Nathan points out that this has some semantic conflicts with a patch in
> Greg's TTY tree: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?id=f32fcbedbe9290565e4eac3fd7c4c451d5478787
>
> So I think the best bet is to wait on Greg's patch to land in Linus'
> tree, and then base a v6 of this patch set on that merged patch. I'm
> going to drop this one from for-next.
Greg's patch is now available in upstream Linux so I will rebase and
send out v6.
Thanks,
Anup
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v5 0/5] RISC-V SBI debug console extension support
2024-01-19 10:09 ` Anup Patel
@ 2024-01-19 21:59 ` Palmer Dabbelt
2024-01-20 4:00 ` Anup Patel
0 siblings, 1 reply; 14+ messages in thread
From: Palmer Dabbelt @ 2024-01-19 21:59 UTC (permalink / raw)
To: apatel
Cc: Greg KH, nathan, linux-riscv, Paul Walmsley, jirislaby,
Conor Dooley, ajones, linux-serial, linuxppc-dev, linux-kernel
On Fri, 19 Jan 2024 02:09:18 PST (-0800), apatel@ventanamicro.com wrote:
> On Sat, Jan 13, 2024 at 12:00 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>>
>> On Thu, 11 Jan 2024 06:50:37 PST (-0800), patchwork-bot+linux-riscv@kernel.org wrote:
>> > Hello:
>> >
>> > This series was applied to riscv/linux.git (for-next)
>> > by Palmer Dabbelt <palmer@rivosinc.com>:
>> >
>> > On Fri, 24 Nov 2023 12:39:00 +0530 you wrote:
>> >> The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines
>> >> SBI debug console (DBCN) extension which replaces the legacy SBI v0.1
>> >> functions sbi_console_putchar() and sbi_console_getchar().
>> >> (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases)
>> >>
>> >> This series adds support for SBI debug console (DBCN) extension in
>> >> Linux RISC-V.
>> >>
>> >> [...]
>> >
>> > Here is the summary with links:
>> > - [v5,1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
>> > https://git.kernel.org/riscv/c/f503b167b660
>> > - [v5,2/5] RISC-V: Add SBI debug console helper routines
>> > https://git.kernel.org/riscv/c/f43fabf444ca
>> > - [v5,3/5] tty/serial: Add RISC-V SBI debug console based earlycon
>> > https://git.kernel.org/riscv/c/c77bf3607a0f
>> > - [v5,4/5] tty: Add SBI debug console support to HVC SBI driver
>> > https://git.kernel.org/riscv/c/88ead68e764c
>> > - [v5,5/5] RISC-V: Enable SBI based earlycon support
>> > https://git.kernel.org/riscv/c/50942ad6ddb5
>> >
>> > You are awesome, thank you!
>>
>> Nathan points out that this has some semantic conflicts with a patch in
>> Greg's TTY tree: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?id=f32fcbedbe9290565e4eac3fd7c4c451d5478787
>>
>> So I think the best bet is to wait on Greg's patch to land in Linus'
>> tree, and then base a v6 of this patch set on that merged patch. I'm
>> going to drop this one from for-next.
>
> Greg's patch is now available in upstream Linux so I will rebase and
> send out v6.
Sorry, I forgot about this one and merged it. I just sent up a fixup:
https://lore.kernel.org/all/20240119215612.20529-2-palmer@rivosinc.com/
.
>
> Thanks,
> Anup
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v5 0/5] RISC-V SBI debug console extension support
2024-01-19 21:59 ` Palmer Dabbelt
@ 2024-01-20 4:00 ` Anup Patel
0 siblings, 0 replies; 14+ messages in thread
From: Anup Patel @ 2024-01-20 4:00 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: apatel, Greg KH, nathan, linux-riscv, Paul Walmsley, jirislaby,
Conor Dooley, ajones, linux-serial, linuxppc-dev, linux-kernel
On Sat, Jan 20, 2024 at 3:29 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> On Fri, 19 Jan 2024 02:09:18 PST (-0800), apatel@ventanamicro.com wrote:
> > On Sat, Jan 13, 2024 at 12:00 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
> >>
> >> On Thu, 11 Jan 2024 06:50:37 PST (-0800), patchwork-bot+linux-riscv@kernel.org wrote:
> >> > Hello:
> >> >
> >> > This series was applied to riscv/linux.git (for-next)
> >> > by Palmer Dabbelt <palmer@rivosinc.com>:
> >> >
> >> > On Fri, 24 Nov 2023 12:39:00 +0530 you wrote:
> >> >> The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines
> >> >> SBI debug console (DBCN) extension which replaces the legacy SBI v0.1
> >> >> functions sbi_console_putchar() and sbi_console_getchar().
> >> >> (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases)
> >> >>
> >> >> This series adds support for SBI debug console (DBCN) extension in
> >> >> Linux RISC-V.
> >> >>
> >> >> [...]
> >> >
> >> > Here is the summary with links:
> >> > - [v5,1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
> >> > https://git.kernel.org/riscv/c/f503b167b660
> >> > - [v5,2/5] RISC-V: Add SBI debug console helper routines
> >> > https://git.kernel.org/riscv/c/f43fabf444ca
> >> > - [v5,3/5] tty/serial: Add RISC-V SBI debug console based earlycon
> >> > https://git.kernel.org/riscv/c/c77bf3607a0f
> >> > - [v5,4/5] tty: Add SBI debug console support to HVC SBI driver
> >> > https://git.kernel.org/riscv/c/88ead68e764c
> >> > - [v5,5/5] RISC-V: Enable SBI based earlycon support
> >> > https://git.kernel.org/riscv/c/50942ad6ddb5
> >> >
> >> > You are awesome, thank you!
> >>
> >> Nathan points out that this has some semantic conflicts with a patch in
> >> Greg's TTY tree: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?id=f32fcbedbe9290565e4eac3fd7c4c451d5478787
> >>
> >> So I think the best bet is to wait on Greg's patch to land in Linus'
> >> tree, and then base a v6 of this patch set on that merged patch. I'm
> >> going to drop this one from for-next.
> >
> > Greg's patch is now available in upstream Linux so I will rebase and
> > send out v6.
>
> Sorry, I forgot about this one and merged it. I just sent up a fixup:
> https://lore.kernel.org/all/20240119215612.20529-2-palmer@rivosinc.com/
No issues. Apart from a minor comment, your fixup looks good to me.
Thanks,
Anup
> .
>
> >
> > Thanks,
> > Anup
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread