From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
virtualization@lists.linux-foundation.org
Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu,
guoren@kernel.org
Subject: [PATCH v1 13/14] RISC-V: KVM: selftests: Add steal_time test support
Date: Tue, 5 Dec 2023 19:11:33 +0100 [thread overview]
Message-ID: <20231205181119.207204-29-ajones@ventanamicro.com> (raw)
In-Reply-To: <20231205181119.207204-16-ajones@ventanamicro.com>
With the introduction of steal-time accounting support for
RISC-V KVM we can add RISC-V support to the steal_time test.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
tools/testing/selftests/kvm/Makefile | 5 +-
.../selftests/kvm/include/riscv/processor.h | 1 +
tools/testing/selftests/kvm/steal_time.c | 99 +++++++++++++++++++
3 files changed, 103 insertions(+), 2 deletions(-)
diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile
index a5963ab9215b..ab52bd0c0c5b 100644
--- a/tools/testing/selftests/kvm/Makefile
+++ b/tools/testing/selftests/kvm/Makefile
@@ -193,12 +193,13 @@ TEST_GEN_PROGS_s390x += kvm_binary_stats_test
TEST_GEN_PROGS_riscv += demand_paging_test
TEST_GEN_PROGS_riscv += dirty_log_test
-TEST_GEN_PROGS_riscv += guest_print_test
TEST_GEN_PROGS_riscv += get-reg-list
+TEST_GEN_PROGS_riscv += guest_print_test
+TEST_GEN_PROGS_riscv += kvm_binary_stats_test
TEST_GEN_PROGS_riscv += kvm_create_max_vcpus
TEST_GEN_PROGS_riscv += kvm_page_table_test
TEST_GEN_PROGS_riscv += set_memory_region_test
-TEST_GEN_PROGS_riscv += kvm_binary_stats_test
+TEST_GEN_PROGS_riscv += steal_time
SPLIT_TESTS += get-reg-list
diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h
index dc50ad62e150..a0f9efe5a2a8 100644
--- a/tools/testing/selftests/kvm/include/riscv/processor.h
+++ b/tools/testing/selftests/kvm/include/riscv/processor.h
@@ -128,6 +128,7 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype,
enum sbi_ext_id {
SBI_EXT_BASE = 0x10,
+ SBI_EXT_STA = 0x535441,
};
enum sbi_ext_base_fid {
diff --git a/tools/testing/selftests/kvm/steal_time.c b/tools/testing/selftests/kvm/steal_time.c
index 171adfb2a6cb..bae0c5026f82 100644
--- a/tools/testing/selftests/kvm/steal_time.c
+++ b/tools/testing/selftests/kvm/steal_time.c
@@ -11,7 +11,9 @@
#include <pthread.h>
#include <linux/kernel.h>
#include <asm/kvm.h>
+#ifndef __riscv
#include <asm/kvm_para.h>
+#endif
#include "test_util.h"
#include "kvm_util.h"
@@ -203,6 +205,103 @@ static void steal_time_dump(struct kvm_vm *vm, uint32_t vcpu_idx)
pr_info(" st_time: %ld\n", st->st_time);
}
+#elif defined(__riscv)
+
+/* SBI STA shmem must have 64-byte alignment */
+#define STEAL_TIME_SIZE ((sizeof(struct sta_struct) + 63) & ~63)
+
+static vm_paddr_t st_gpa[NR_VCPUS];
+
+struct sta_struct {
+ uint32_t sequence;
+ uint32_t flags;
+ uint64_t steal;
+ uint8_t preempted;
+ uint8_t pad[47];
+} __packed;
+
+static void sta_set_shmem(vm_paddr_t gpa, unsigned long flags)
+{
+ unsigned long lo = (unsigned long)gpa;
+#if __riscv_xlen == 32
+ unsigned long hi = (unsigned long)(gpa >> 32);
+#else
+ unsigned long hi = gpa == -1 ? -1 : 0;
+#endif
+ struct sbiret ret = sbi_ecall(SBI_EXT_STA, 0, lo, hi, flags, 0, 0, 0);
+
+ GUEST_ASSERT(ret.value == 0 && ret.error == 0);
+}
+
+static void check_status(struct sta_struct *st)
+{
+ GUEST_ASSERT(!(READ_ONCE(st->sequence) & 1));
+ GUEST_ASSERT(READ_ONCE(st->flags) == 0);
+ GUEST_ASSERT(READ_ONCE(st->preempted) == 0);
+}
+
+static void guest_code(int cpu)
+{
+ struct sta_struct *st = st_gva[cpu];
+ uint32_t sequence;
+ long out_val = 0;
+ bool probe;
+
+ probe = guest_sbi_probe_extension(SBI_EXT_STA, &out_val);
+ GUEST_ASSERT(probe && out_val == 1);
+
+ sta_set_shmem(st_gpa[cpu], 0);
+ GUEST_SYNC(0);
+
+ check_status(st);
+ WRITE_ONCE(guest_stolen_time[cpu], st->steal);
+ sequence = READ_ONCE(st->sequence);
+ check_status(st);
+ GUEST_SYNC(1);
+
+ check_status(st);
+ GUEST_ASSERT(sequence < READ_ONCE(st->sequence));
+ WRITE_ONCE(guest_stolen_time[cpu], st->steal);
+ check_status(st);
+ GUEST_DONE();
+}
+
+static bool is_steal_time_supported(struct kvm_vcpu *vcpu)
+{
+ uint64_t id = RISCV_SBI_EXT_REG(KVM_RISCV_SBI_EXT_STA);
+ unsigned long enabled;
+
+ vcpu_get_reg(vcpu, id, &enabled);
+ TEST_ASSERT(enabled == 0 || enabled == 1, "Expected boolean result");
+
+ return enabled;
+}
+
+static void steal_time_init(struct kvm_vcpu *vcpu, uint32_t i)
+{
+ /* ST_GPA_BASE is identity mapped */
+ st_gva[i] = (void *)(ST_GPA_BASE + i * STEAL_TIME_SIZE);
+ st_gpa[i] = addr_gva2gpa(vcpu->vm, (vm_vaddr_t)st_gva[i]);
+ sync_global_to_guest(vcpu->vm, st_gva[i]);
+ sync_global_to_guest(vcpu->vm, st_gpa[i]);
+}
+
+static void steal_time_dump(struct kvm_vm *vm, uint32_t vcpu_idx)
+{
+ struct sta_struct *st = addr_gva2hva(vm, (ulong)st_gva[vcpu_idx]);
+ int i;
+
+ pr_info("VCPU%d:\n", vcpu_idx);
+ pr_info(" sequence: %d\n", st->sequence);
+ pr_info(" flags: %d\n", st->flags);
+ pr_info(" steal: %"PRIu64"\n", st->steal);
+ pr_info(" preempted: %d\n", st->preempted);
+ pr_info(" pad: ");
+ for (i = 0; i < 47; ++i)
+ pr_info("%d", st->pad[i]);
+ pr_info("\n");
+}
+
#endif
static void *do_steal_time(void *arg)
--
2.43.0
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next prev parent reply other threads:[~2023-12-05 18:12 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-05 18:11 [PATCH v1 00/14] RISC-V: Add steal-time support Andrew Jones
2023-12-05 18:11 ` [PATCH v1 01/14] RISC-V: paravirt: Add skeleton for pv-time support Andrew Jones
2023-12-05 18:11 ` [PATCH v1 02/14] RISC-V: Add SBI STA extension definitions Andrew Jones
2023-12-05 18:11 ` [PATCH v1 03/14] RISC-V: paravirt: Implement steal-time support Andrew Jones
2023-12-07 14:06 ` Conor Dooley
2023-12-07 14:44 ` Andrew Jones
2023-12-05 18:11 ` [PATCH v1 04/14] RISC-V: paravirt: Add kconfigs Andrew Jones
2023-12-07 14:07 ` Conor Dooley
2023-12-07 14:46 ` Andrew Jones
2023-12-05 18:11 ` [PATCH v1 05/14] RISC-V: KVM: Add SBI STA extension skeleton Andrew Jones
2023-12-05 18:11 ` [PATCH v1 06/14] RISC-V: KVM: Add steal-update vcpu request Andrew Jones
2023-12-05 18:11 ` [PATCH v1 07/14] RISC-V: KVM: Add SBI STA info to vcpu_arch Andrew Jones
2023-12-05 18:11 ` [PATCH v1 08/14] RISC-V: KVM: Add support for SBI extension registers Andrew Jones
2023-12-05 18:11 ` [PATCH v1 09/14] RISC-V: KVM: Add support for SBI STA registers Andrew Jones
2023-12-05 18:11 ` [PATCH v1 10/14] RISC-V: KVM: Implement SBI STA extension Andrew Jones
2023-12-05 18:11 ` [PATCH v1 11/14] RISC-V: KVM: selftests: Move sbi_ecall to processor.c Andrew Jones
2023-12-05 18:11 ` [PATCH v1 12/14] RISC-V: KVM: selftests: Add guest_sbi_probe_extension Andrew Jones
2023-12-05 18:11 ` Andrew Jones [this message]
2023-12-05 18:11 ` [PATCH v1 14/14] RISC-V: KVM: selftests: Add get-reg-list test for STA registers Andrew Jones
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