From: Conor Dooley <conor.dooley@microchip.com>
To: Atish Patra <atishp@rivosinc.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Alexandre Ghiti <alexghiti@rivosinc.com>,
kvm@vger.kernel.org, Anup Patel <anup@brainfault.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
linux-kernel@vger.kernel.org, Guo Ren <guoren@kernel.org>,
kvm-riscv@lists.infradead.org,
Atish Patra <atishp@atishpatra.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, Will Deacon <will@kernel.org>,
Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [RFC 2/9] drivers/perf: riscv: Add a flag to indicate SBI v2.0 support
Date: Thu, 7 Dec 2023 12:07:58 +0000 [thread overview]
Message-ID: <20231207-professed-component-84128c06befa@wendy> (raw)
In-Reply-To: <20231205024310.1593100-3-atishp@rivosinc.com>
[-- Attachment #1.1: Type: text/plain, Size: 1328 bytes --]
On Mon, Dec 04, 2023 at 06:43:03PM -0800, Atish Patra wrote:
> SBI v2.0 added few functions to improve SBI PMU extension. In order
> to be backward compatible, the driver must use these functions only
> if SBI v2.0 is available.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
IMO this does not make sense in a patch of its own and should probably
be squashed with the first user for it.
> ---
> drivers/perf/riscv_pmu_sbi.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index 16acd4dcdb96..40a335350d08 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -35,6 +35,8 @@
> PMU_FORMAT_ATTR(event, "config:0-47");
> PMU_FORMAT_ATTR(firmware, "config:63");
>
> +static bool sbi_v2_available;
> +
> static struct attribute *riscv_arch_formats_attr[] = {
> &format_attr_event.attr,
> &format_attr_firmware.attr,
> @@ -1108,6 +1110,9 @@ static int __init pmu_sbi_devinit(void)
> return 0;
> }
>
> + if (sbi_spec_version >= sbi_mk_version(2, 0))
> + sbi_v2_available = true;
> +
> ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_RISCV_STARTING,
> "perf/riscv/pmu:starting",
> pmu_sbi_starting_cpu, pmu_sbi_dying_cpu);
> --
> 2.34.1
>
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-12-07 12:09 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-05 2:43 [RFC 0/9] RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest Atish Patra
2023-12-05 2:43 ` [RFC 1/9] RISC-V: Fix the typo in Scountovf CSR name Atish Patra
2023-12-07 12:04 ` Conor Dooley
2023-12-14 12:13 ` Anup Patel
2023-12-05 2:43 ` [RFC 2/9] drivers/perf: riscv: Add a flag to indicate SBI v2.0 support Atish Patra
2023-12-07 12:07 ` Conor Dooley [this message]
2023-12-14 12:15 ` Anup Patel
2023-12-16 23:54 ` Atish Kumar Patra
2023-12-05 2:43 ` [RFC 3/9] RISC-V: Add FIRMWARE_READ_HI definition Atish Patra
2023-12-07 12:11 ` Conor Dooley
2023-12-14 12:16 ` Anup Patel
2023-12-05 2:43 ` [RFC 4/9] drivers/perf: riscv: Read upper bits of a firmware counter Atish Patra
2023-12-07 12:32 ` Conor Dooley
2023-12-14 12:30 ` Anup Patel
2023-12-16 23:54 ` Atish Kumar Patra
2023-12-05 2:43 ` [RFC 5/9] RISC-V: Add SBI PMU snapshot definitions Atish Patra
2023-12-07 12:33 ` Conor Dooley
2023-12-16 23:33 ` Atish Patra
2023-12-14 12:32 ` Anup Patel
2023-12-05 2:43 ` [RFC 6/9] drivers/perf: riscv: Implement SBI PMU snapshot function Atish Patra
2023-12-07 13:05 ` Conor Dooley
2023-12-17 1:39 ` Atish Kumar Patra
2023-12-17 12:10 ` Conor Dooley
2023-12-18 0:57 ` Atish Kumar Patra
2023-12-05 2:43 ` [RFC 7/9] RISC-V: KVM: Implement SBI PMU Snapshot feature Atish Patra
2023-12-14 13:46 ` Anup Patel
2023-12-17 9:36 ` Atish Kumar Patra
2023-12-05 2:43 ` [RFC 8/9] RISC-V: KVM: Add perf sampling support for guests Atish Patra
2023-12-06 6:43 ` Vladimir Isaev
2023-12-06 7:41 ` Atish Kumar Patra
2023-12-14 16:02 ` Anup Patel
2023-12-17 1:48 ` Atish Kumar Patra
2023-12-05 2:43 ` [RFC 9/9] RISC-V: KVM: Support 64 bit firmware counters on RV32 Atish Patra
2023-12-14 12:41 ` Anup Patel
2023-12-07 12:02 ` [RFC 0/9] RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest Conor Dooley
2023-12-07 22:28 ` Atish Kumar Patra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231207-professed-component-84128c06befa@wendy \
--to=conor.dooley@microchip.com \
--cc=ajones@ventanamicro.com \
--cc=alexghiti@rivosinc.com \
--cc=anup@brainfault.org \
--cc=atishp@atishpatra.org \
--cc=atishp@rivosinc.com \
--cc=guoren@kernel.org \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox