From: Eric Biggers <ebiggers@kernel.org>
To: Andy Chiu <andy.chiu@sifive.com>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, greentime.hu@sifive.com,
guoren@linux.alibaba.com, bjorn@kernel.org, charlie@rivosinc.com,
ardb@kernel.org, arnd@arndb.de, peterz@infradead.org,
tglx@linutronix.de, "Vincent Chen" <vincent.chen@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Heiko Stuebner" <heiko@sntech.de>, "Baoquan He" <bhe@redhat.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Guo Ren" <guoren@kernel.org>,
"Xiao Wang" <xiao.w.wang@intel.com>,
"Björn Töpel" <bjorn@rivosinc.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Alexandre Ghiti" <alexghiti@rivosinc.com>,
"Evan Green" <evan@rivosinc.com>,
"Sami Tolvanen" <samitolvanen@google.com>,
"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
"Jisheng Zhang" <jszhang@kernel.org>
Subject: Re: [v9, 01/10] riscv: Add support for kernel mode vector
Date: Fri, 29 Dec 2023 19:05:44 -0600 [thread overview]
Message-ID: <20231230010544.GA770@quark.localdomain> (raw)
In-Reply-To: <20231229143627.22898-2-andy.chiu@sifive.com>
On Fri, Dec 29, 2023 at 02:36:18PM +0000, Andy Chiu wrote:
> From: Greentime Hu <greentime.hu@sifive.com>
>
> Add kernel_vector_begin() and kernel_vector_end() function declarations
> and corresponding definitions in kernel_mode_vector.c
>
> These are needed to wrap uses of vector in kernel mode.
>
> Co-developed-by: Vincent Chen <vincent.chen@sifive.com>
> Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Eric Biggers <ebiggers@google.com>
> +/*
> + * We use a flag to track in-kernel Vector context. Currently the flag has the
> + * following meaning:
> + *
> + * - bit 0: indicates whether the in-kernel Vector context is active. The
> + * activation of this state disables the preemption. Currently only 0 and 1
> + * are valid value for this field. Other values are reserved for future uses.
> + */
The last two sentences above can be deleted. Bits can only be 0 or 1.
- Eric
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next prev parent reply other threads:[~2023-12-30 1:06 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-29 14:36 [v9, 00/10] riscv: support kernel-mode Vector Andy Chiu
2023-12-29 14:36 ` [v9, 01/10] riscv: Add support for kernel mode vector Andy Chiu
2023-12-30 1:05 ` Eric Biggers [this message]
2023-12-29 14:36 ` [v9, 02/10] riscv: vector: make Vector always available for softirq context Andy Chiu
2023-12-30 1:07 ` Eric Biggers
2023-12-29 14:36 ` [v9, 03/10] riscv: Add vector extension XOR implementation Andy Chiu
2023-12-29 14:36 ` [v9, 04/10] riscv: sched: defer restoring Vector context for user Andy Chiu
2023-12-29 14:36 ` [v9, 05/10] riscv: lib: vectorize copy_to_user/copy_from_user Andy Chiu
2023-12-29 14:36 ` [v9, 06/10] riscv: fpu: drop SR_SD bit checking Andy Chiu
2024-01-04 9:00 ` Song Shuai
2024-01-04 12:34 ` Guo Ren
2023-12-29 14:36 ` [v9, 07/10] riscv: vector: do not pass task_struct into riscv_v_vstate_{save,restore}() Andy Chiu
2023-12-29 14:36 ` [v9, 08/10] riscv: vector: use a mask to write vstate_ctrl Andy Chiu
2023-12-29 14:36 ` [v9, 09/10] riscv: vector: use kmem_cache to manage vector context Andy Chiu
2023-12-29 14:36 ` [v9, 10/10] riscv: vector: allow kernel-mode Vector with preemption Andy Chiu
2024-01-04 15:02 ` Wang, Xiao W
2024-01-10 15:31 ` Andy Chiu
2024-01-11 13:26 ` Andy Chiu
2024-01-05 18:59 ` [v9, 00/10] riscv: support kernel-mode Vector Eric Biggers
2024-01-08 3:16 ` Andy Chiu
2024-01-08 3:52 ` Eric Biggers
2024-01-10 15:02 ` Palmer Dabbelt
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