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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id ij15-20020a056402158f00b0055410f0d709sm4143181edb.19.2024.01.08.03.35.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 03:35:14 -0800 (PST) Date: Mon, 8 Jan 2024 12:35:13 +0100 From: Andrew Jones To: Andrea Parri Cc: Christoph =?utf-8?Q?M=C3=BCllner?= , Heiko Stuebner , linux-riscv@lists.infradead.org, palmer@dabbelt.com, paul.walmsley@sifive.com, linux-kernel@vger.kernel.org, David.Laight@aculab.com, Conor Dooley Subject: Re: Re: [PATCH v3 0/2] Add Zawrs support and use it for spinlocks Message-ID: <20240108-a56ba0dfd1779e4ab6893d16@orel> References: <20230521114715.955823-1-heiko.stuebner@vrull.eu> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240108_033519_604013_5B4F2EA5 X-CRM114-Status: GOOD ( 22.66 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Oct 20, 2023 at 12:19:38PM +0200, Andrea Parri wrote: > (Removing Heiko's @vrull address from Cc:, since it seemed to bounce, keeping > his @sntech address.) > > > I had a quick look at your changes, and they look good to me. > > Great. Thank you for looking them over. > > > Did you agree with Palmer about testing requirements? > > I.e., do we need to run this on hardware that implements Zawrs in a > > non-trivial way? > > I didn't quite discuss such specific requirements or hardware implementations, > but I agree that's a valid concern. Not that I currently have access to such > hardware; any further inputs/data will be appreciated. > > > I can try to raise the priority on this here, but can't promise anything. > > For me it is also ok if you take over this patchset. > > Thanks. Either way works for me. No urgency from my side. I'd say - let us > leave this up to the community/other reviewers. (IIUC, Palmer was recovering > from a certain flu and might need more time than usual to get back here.) > Hi everyone, I'm also interested in seeing this series resurrected and making progress again. I'd be happy to help out in any way. It's not clear to me if it has a current owner. If not, then I could start shepherding the patches with their authorships intact. I may be able to do some testing on an FPGA too. Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv