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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1704746689; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QFJeHLw9GqQjgm3FgM7p7sOy93Z0Ypb7HjJTBpJG3O4=; b=UkgPg0VuU9/DJID5oFyG5SAC8mwxbwH9zoayBjaH1aPk1owx29WmNSIHFu5RQYR6X7Uq9u sC2u8FaismFOZzCQ== From: Nam Cao To: Alexandre Ghiti Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Jisheng Zhang Subject: Re: [PATCH v2] riscv: Add support for BATCHED_UNMAP_TLB_FLUSH Message-ID: <20240108214448.025977ac@namcao> In-Reply-To: <20240108214346.5fd93127@namcao> References: <20240108193640.344929-1-alexghiti@rivosinc.com> <20240108214346.5fd93127@namcao> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240108_124453_655344_34CA20B8 X-CRM114-Status: GOOD ( 16.57 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 8 Jan 2024 21:43:46 +0100 Nam Cao wrote: > On Mon, 8 Jan 2024 20:36:40 +0100 Alexandre Ghiti wrote: > > Allow to defer the flushing of the TLB when unmapping pages, which allows > > to reduce the numbers of IPI and the number of sfence.vma. > > > > The ubenchmarch used in commit 43b3dfdd0455 ("arm64: support > > batched/deferred tlb shootdown during page reclamation/migration") that > > was multithreaded to force the usage of IPI shows good performance > > improvement on all platforms: > > > > * Unmatched: ~34% > > * TH1520 : ~78% > > * Qemu : ~81% > > > > In addition, perf on qemu reports an important decrease in time spent > > dealing with IPIs: > > > > Before: 68.17% main [kernel.kallsyms] [k] __sbi_rfence_v02_call > > After : 8.64% main [kernel.kallsyms] [k] __sbi_rfence_v02_call > > > > * Benchmark: > > > > int stick_this_thread_to_core(int core_id) { > > int num_cores = sysconf(_SC_NPROCESSORS_ONLN); > > if (core_id < 0 || core_id >= num_cores) > > return EINVAL; > > > > cpu_set_t cpuset; > > CPU_ZERO(&cpuset); > > CPU_SET(core_id, &cpuset); > > > > pthread_t current_thread = pthread_self(); > > return pthread_setaffinity_np(current_thread, > > sizeof(cpu_set_t), &cpuset); > > } > > > > static void *fn_thread (void *p_data) > > { > > int ret; > > pthread_t thread; > > > > stick_this_thread_to_core((int)p_data); > > > > while (1) { > > sleep(1); > > } > > > > return NULL; > > } > > > > int main() > > { > > volatile unsigned char *p = mmap(NULL, SIZE, PROT_READ | PROT_WRITE, > > MAP_SHARED | MAP_ANONYMOUS, -1, 0); > > pthread_t threads[4]; > > int ret; > > > > for (int i = 0; i < 4; ++i) { > > ret = pthread_create(&threads[i], NULL, fn_thread, (void *)i); > > if (ret) > > { > > printf("%s", strerror (ret)); > > } > > } > > > > memset(p, 0x88, SIZE); > > > > for (int k = 0; k < 10000; k++) { > > /* swap in */ > > for (int i = 0; i < SIZE; i += 4096) { > > (void)p[i]; > > } > > > > /* swap out */ > > madvise(p, SIZE, MADV_PAGEOUT); > > } > > > > for (int i = 0; i < 4; i++) > > { > > pthread_cancel(threads[i]); > > } > > > > for (int i = 0; i < 4; i++) > > { > > pthread_join(threads[i], NULL); > > } > > > > return 0; > > } > > > > Signed-off-by: Alexandre Ghiti > > Reviewed-by: Jisheng Zhang > > Tested-by: Jisheng Zhang # Tested on TH1520 > > Before: > real 0m36.674s > user 0m0.173s > sys 0m36.493s > After: > real 0m18.016s > user 0m0.125s > sys 0m17.885s > > Tested-by: Nam Cao I forgot to mention: this is for Starfive's Visionfive 2 board. Best regards, Nam _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv