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boundary="===============4836372390986346427==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org --===============4836372390986346427== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="H4mv7uwP1RXcpRTP" Content-Disposition: inline --H4mv7uwP1RXcpRTP Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote: > The Milkv Mars is a development board based on the Starfive JH7110 SoC. > The board features: >=20 > - JH7110 SoC > - 1/2/4/8 GiB LPDDR4 DRAM > - AXP15060 PMIC > - 40 pin GPIO header > - 3x USB 3.0 host port > - 1x USB 2.0 host port > - 1x M.2 E-Key > - 1x eMMC slot > - 1x MicroSD slot > - 1x QSPI Flash > - 1x 1Gbps Ethernet port > - 1x HDMI port > - 1x 2-lane DSI and 1x 4-lane DSI > - 1x 2-lane CSI >=20 > Add the devicetree file describing the currently supported features, > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet. >=20 > Signed-off-by: Jisheng Zhang Got a dtbs_check issue in the patchwork CI: +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clo= ck: 'clock-frequency' is a required property + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml# +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clo= ck: 'clock-frequency' is a required property + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml# Can you fix that please? Also, I applied some patches the other day that seem to conflict quite a bit with the common board dts patch. Would you please do a rebase on top of that please? Cheers, Conor. > --- > arch/riscv/boot/dts/starfive/Makefile | 1 + > .../boot/dts/starfive/jh7110-milkv-mars.dts | 35 +++++++++++++++++++ > 2 files changed, 36 insertions(+) > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts >=20 > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/= starfive/Makefile > index 0141504c0f5c..2fa0cd7f31c3 100644 > --- a/arch/riscv/boot/dts/starfive/Makefile > +++ b/arch/riscv/boot/dts/starfive/Makefile > @@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b :=3D -@ > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7100-beaglev-starlight.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7100-starfive-visionfive-v1.dtb > =20 > +dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-milkv-mars.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.2a.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.3b.dtb > diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/ri= scv/boot/dts/starfive/jh7110-milkv-mars.dts > new file mode 100644 > index 000000000000..de600e799e7d > --- /dev/null > +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts > @@ -0,0 +1,35 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2023 Jisheng Zhang > + */ > + > +/dts-v1/; > +#include "jh7110-visionfive2-mars-common.dtsi" > + > +/ { > + model =3D "Milk-V Mars"; > + compatible =3D "milkv,mars", "starfive,jh7110"; > +}; > + > +&gmac0 { > + starfive,tx-use-rgmii-clk; > + assigned-clocks =3D <&aoncrg JH7110_AONCLK_GMAC0_TX>; > + assigned-clock-parents =3D <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; > +}; > + > + > +&phy0 { > + motorcomm,tx-clk-adj-enabled; > + motorcomm,tx-clk-10-inverted; > + motorcomm,tx-clk-100-inverted; > + motorcomm,tx-clk-1000-inverted; > + motorcomm,rx-clk-drv-microamp =3D <3970>; > + motorcomm,rx-data-drv-microamp =3D <2910>; > + rx-internal-delay-ps =3D <1500>; > + tx-internal-delay-ps =3D <1500>; > +}; > + > +&mmc1 { > + disable-wp; > + cd-gpios =3D <&sysgpio 41 GPIO_ACTIVE_LOW>; > +}; > --=20 > 2.43.0 >=20 --H4mv7uwP1RXcpRTP Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZcKE7AAKCRB4tDGHoIJi 0ozhAQC7TY7fFtI+7Cw4EcbHg3iXLfPgEJADK1Liq8mObgwtEgD9G0Z1TigpDQda rA37daVrT5yyYKio+Rl1uMG5ig+GVA4= =5e08 -----END PGP SIGNATURE----- --H4mv7uwP1RXcpRTP-- --===============4836372390986346427== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============4836372390986346427==--