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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id i14-20020a5d558e000000b0033929310ae4sm9749747wrv.73.2024.02.13.06.49.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Feb 2024 06:49:14 -0800 (PST) Date: Tue, 13 Feb 2024 15:49:13 +0100 From: Andrew Jones To: Samuel Holland Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Stefan O'Rear , stable@vger.kernel.org Subject: Re: [PATCH -fixes v2 4/4] riscv: Save/restore envcfg CSR during CPU suspend Message-ID: <20240213-86af3b49821630b5bdd76c0a@orel> References: <20240213033744.4069020-1-samuel.holland@sifive.com> <20240213033744.4069020-5-samuel.holland@sifive.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240213033744.4069020-5-samuel.holland@sifive.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240213_064916_637573_14802668 X-CRM114-Status: GOOD ( 18.26 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Feb 12, 2024 at 07:37:35PM -0800, Samuel Holland wrote: > The value of the [ms]envcfg CSR is lost when entering a nonretentive > idle state, so the CSR must be rewritten when resuming the CPU. > > Cc: # v6.7+ > Fixes: 43c16d51a19b ("RISC-V: Enable cbo.zero in usermode") > Signed-off-by: Samuel Holland > --- > > Changes in v2: > - Check for privileged ISA v1.12 instead of the specific CSR > - Use riscv_has_extension_likely() instead of new ALTERNATIVE()s > > arch/riscv/include/asm/suspend.h | 1 + > arch/riscv/kernel/suspend.c | 4 ++++ > 2 files changed, 5 insertions(+) > > diff --git a/arch/riscv/include/asm/suspend.h b/arch/riscv/include/asm/suspend.h > index 02f87867389a..491296a335d0 100644 > --- a/arch/riscv/include/asm/suspend.h > +++ b/arch/riscv/include/asm/suspend.h > @@ -14,6 +14,7 @@ struct suspend_context { > struct pt_regs regs; > /* Saved and restored by high-level functions */ > unsigned long scratch; > + unsigned long envcfg; > unsigned long tvec; > unsigned long ie; > #ifdef CONFIG_MMU > diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c > index 239509367e42..be03615486ed 100644 > --- a/arch/riscv/kernel/suspend.c > +++ b/arch/riscv/kernel/suspend.c > @@ -15,6 +15,8 @@ > void suspend_save_csrs(struct suspend_context *context) > { > context->scratch = csr_read(CSR_SCRATCH); > + if (riscv_has_extension_likely(RISCV_ISA_EXT_Sx1p12)) > + context->envcfg = csr_read(CSR_ENVCFG); > context->tvec = csr_read(CSR_TVEC); > context->ie = csr_read(CSR_IE); > > @@ -36,6 +38,8 @@ void suspend_save_csrs(struct suspend_context *context) > void suspend_restore_csrs(struct suspend_context *context) > { > csr_write(CSR_SCRATCH, context->scratch); > + if (riscv_has_extension_likely(RISCV_ISA_EXT_Sx1p12)) > + csr_write(CSR_ENVCFG, context->envcfg); > csr_write(CSR_TVEC, context->tvec); > csr_write(CSR_IE, context->ie); > > -- > 2.43.0 > We're still exposing Zicboz to userspace in hwprobe when only RISCV_ISA_EXT_ZICBOZ is present, which will be the case for anything that either doesn't implement 1.12, but does implement Zicboz, or maybe does implement 1.12, but hasn't started putting Ss1p12 in its ISA string yet (e.g. QEMU). We should either stop exposing Zicboz to userspace in those cases (since it won't work) or rethink how we want to determine whether or not we have envcfg CSRs. Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv