[PATCH v3 1/4] riscv/barrier: Define __{mb,rmb,wmb}

Eric Chan
2024-02-13T14:29:49Z

Introduce __{mb,rmb,wmb}, and rely on the generic definitions
for {mb,rmb,wmb}.
Although KCSAN is not yet support,
it can be made more consistent with generic instrumentation.

Signed-off-by: Eric Chan <ericchancf@google.com>
---
arch/riscv/include/asm/barrier.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/barrier.h b/arch/riscv/include/asm/barrier.h
index 110752594228..4c49a8ff2c68 100644
--- a/arch/riscv/include/asm/barrier.h
+++ b/arch/riscv/include/asm/barrier.h
@@ -20,9 +20,9 @@
__asm__ __volatile__ ("fence " #p "," #s : : : "memory")

/* These barriers need to enforce ordering on both devices or memory. */
-#define mb() RISCV_FENCE(iorw,iorw)
-#define rmb() RISCV_FENCE(ir,ir)
-#define wmb() RISCV_FENCE(ow,ow)
+#define __mb() RISCV_FENCE(iorw,iorw)
+#define __rmb() RISCV_FENCE(ir,ir)
+#define __wmb() RISCV_FENCE(ow,ow)

/* These barriers do not need to enforce ordering on devices, just memory. */
#define __smp_mb() RISCV_FENCE(rw,rw)