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From: Eric Chan <ericchancf@google.com>
To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	 ericchancf@google.com, conor.dooley@microchip.com,
	parri.andrea@gmail.com,  emil.renner.berthing@canonical.com,
	samuel.holland@sifive.com
Subject: [PATCH v6 4/4] riscv/barrier: Add missing space after ','
Date: Sat, 17 Feb 2024 13:13:28 +0000	[thread overview]
Message-ID: <20240217131328.3669364-1-ericchancf@google.com> (raw)
In-Reply-To: <20240217131206.3667544-1-ericchancf@google.com>

The past form of RISCV_FENCE would cause checkpatch.pl to issue
error messages, the example is as follows:
ERROR: space required after that ',' (ctx:VxV)
26: FILE: arch/riscv/include/asm/barrier.h:27:
+#define __smp_mb()         RISCV_FENCE(rw,rw)
                                          ^
fix the remaining of RISCV_FENCE.

Signed-off-by: Eric Chan <ericchancf@google.com>
---
v5 -> v6: change the error message example in commit message to make it
more relevant

 arch/riscv/include/asm/barrier.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/riscv/include/asm/barrier.h b/arch/riscv/include/asm/barrier.h
index 15857dbc2279..880b56d8480d 100644
--- a/arch/riscv/include/asm/barrier.h
+++ b/arch/riscv/include/asm/barrier.h
@@ -24,14 +24,14 @@
 #define __wmb()		RISCV_FENCE(ow, ow)

 /* These barriers do not need to enforce ordering on devices, just memory. */
-#define __smp_mb()	RISCV_FENCE(rw,rw)
-#define __smp_rmb()	RISCV_FENCE(r,r)
-#define __smp_wmb()	RISCV_FENCE(w,w)
+#define __smp_mb()	RISCV_FENCE(rw, rw)
+#define __smp_rmb()	RISCV_FENCE(r, r)
+#define __smp_wmb()	RISCV_FENCE(w, w)

 #define __smp_store_release(p, v)					\
 do {									\
 	compiletime_assert_atomic_type(*p);				\
-	RISCV_FENCE(rw,w);						\
+	RISCV_FENCE(rw, w);						\
 	WRITE_ONCE(*p, v);						\
 } while (0)

@@ -39,7 +39,7 @@ do {									\
 ({									\
 	typeof(*p) ___p1 = READ_ONCE(*p);				\
 	compiletime_assert_atomic_type(*p);				\
-	RISCV_FENCE(r,rw);						\
+	RISCV_FENCE(r, rw);						\
 	___p1;								\
 })

@@ -68,7 +68,7 @@ do {									\
  * instances the scheduler pairs this with an mb(), so nothing is necessary on
  * the new hart.
  */
-#define smp_mb__after_spinlock()	RISCV_FENCE(iorw,iorw)
+#define smp_mb__after_spinlock()	RISCV_FENCE(iorw, iorw)

 #include <asm-generic/barrier.h>

--
2.44.0.rc0.258.g7320e95886-goog

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  parent reply	other threads:[~2024-02-17 13:13 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-17 13:12 [PATCH v6 0/4] riscv/barrier: tidying up barrier-related macro Eric Chan
2024-02-17 13:12 ` [PATCH v6 1/4] riscv/barrier: Define __{mb,rmb,wmb} Eric Chan
2024-02-17 13:13 ` [PATCH v6 2/4] riscv/barrier: Define RISCV_FULL_BARRIER Eric Chan
2024-02-17 13:13 ` [PATCH v6 3/4] riscv/barrier: Consolidate fence definitions Eric Chan
2024-02-17 13:13 ` Eric Chan [this message]
2024-02-19 10:12 ` [PATCH v6 0/4] riscv/barrier: tidying up barrier-related macro Andrea Parri
2024-03-12  4:49 ` Samuel Holland
2024-03-20 20:50 ` patchwork-bot+linux-riscv

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