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Thu, 14 Mar 2024 20:07:45 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42EK7imb028294 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 14 Mar 2024 20:07:44 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 14 Mar 2024 13:07:41 -0700 Date: Thu, 14 Mar 2024 13:07:40 -0700 From: Elliot Berman To: Caleb Connolly CC: Amrit Anand , , , , , , , , , , , , , , , Simon Glass Subject: Re: Re: [PATCH v2 2/2] dt-bindings: qcom: Update DT bindings for multiple DT Message-ID: <20240314113908471-0700.eberman@hu-eberman-lv.qualcomm.com> Mail-Followup-To: Caleb Connolly , Amrit Anand , robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@quicinc.com, peter.griffin@linaro.org, linux-riscv@lists.infradead.org, chrome-platform@lists.linux.dev, linux-mediatek@lists.infradead.org, Simon Glass References: <1710418312-6559-1-git-send-email-quic_amrianan@quicinc.com> <1710418312-6559-3-git-send-email-quic_amrianan@quicinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 6lGfARaeuwH6HOGWh8oo9c6RWsGScCpQ X-Proofpoint-GUID: 6lGfARaeuwH6HOGWh8oo9c6RWsGScCpQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-14_13,2024-03-13_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 clxscore=1011 impostorscore=0 lowpriorityscore=0 mlxlogscore=635 spamscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2403140155 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240314_130750_251981_43F960BC X-CRM114-Status: GOOD ( 23.53 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Mar 14, 2024 at 02:20:38PM +0000, Caleb Connolly wrote: > Hi Amrit, > > On 14/03/2024 12:11, Amrit Anand wrote: ... > > > > +examples: > > + - | > > + #include > > + / { > > + model = "Qualcomm Technologies, Inc. sc7280 IDP SKU1 platform"; > > + compatible = "qcom,sc7280-idp", "google,senor", "qcom,sc7280"; > > + > > + #board-id-cells = <2>; > > + board-id = , > > + , > > + ; > > + board-id-types = "qcom,soc-id", > > + "qcom,soc-id", > > + "qcom,board-id"; > Forgive me if this is a particularly cynical view, but this seems > incredibly blatant, the "qcom,board-id" property is deprecated for > various good reasons, just using a key/value map where "qcom,board-id" > is a key doesn't change that. There are two main issues I have with the > proposal here: > > 1. This breaks backwards compatibility, millions of production devices > with bootloaders that will never receive another update might be > compatible with the downstream "qcom,board-id" property, but they won't > work with this. > 2. A top level board-id property that isn't namespaced implies that it > isn't vendor specific, but the proposed implementation doesn't even > pretend to be vendor agnostic. > I agree with the concerns you listed. One point I wanted to bring is that if you provide a boot image that has only one DTB, all production Qualcomm bootloaders I'm aware of will use that DTB so long as "qcom,board-id" isn't a mismatch. I believe this is what most everyone is doing if using the DTBs from kernel.org. We'd like to use an open standard for DTB selection and that would very likely be incompatible with existing bootloaders that don't have whatever that standard is. > U-Boot also has some ideas around this issue, there you can pass in > multiple DTBs and provide some board specific "best match" function. > I think there's definitely some value in exposing this information, but > there's no good reason to define the same data as `qcom,board-id` while > breaking production bootloaders. One concern we have with U-Boot's approach is that it's based on metadata external to the DTB and, in our experience, makes it hard to track which board goes to which DTB. This approach also isn't necessarily portable to other image types/boot flows. Thanks, Elliot _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv