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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id n18-20020a05600c501200b004146bdce3fesm8016711wmr.4.2024.03.22.00.58.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Mar 2024 00:58:44 -0700 (PDT) Date: Fri, 22 Mar 2024 08:58:43 +0100 From: Andrew Jones To: Samuel Holland Cc: Deepak Gupta , Palmer Dabbelt , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Catalin Marinas , linux-kernel@vger.kernel.org, tech-j-ext@lists.risc-v.org, Conor Dooley , kasan-dev@googlegroups.com, Evgenii Stepanov , Krzysztof Kozlowski , Rob Herring , Guo Ren , Heiko Stuebner , Paul Walmsley Subject: Re: [RISC-V] [tech-j-ext] [RFC PATCH 5/9] riscv: Split per-CPU and per-thread envcfg bits Message-ID: <20240322-168f191eeb8479b2ea169a5e@orel> References: <20240319215915.832127-1-samuel.holland@sifive.com> <20240319215915.832127-6-samuel.holland@sifive.com> <40ab1ce5-8700-4a63-b182-1e864f6c9225@sifive.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <40ab1ce5-8700-4a63-b182-1e864f6c9225@sifive.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240322_005848_428997_011E2AF0 X-CRM114-Status: GOOD ( 15.01 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Mar 19, 2024 at 09:20:59PM -0500, Samuel Holland wrote: ... > This is really a separate concern than when we write envcfg. The per-CPU > variable is only necessary to support hardware where a subset of harts support > Zicboz. Since the riscv_cpu_has_extension_[un]likely() helpers were added > specifically for Zicboz, I assume this is an important use case, and dropping > support for this hardware would be a regression. After all, hwprobe() allows > userspace to see that Zicboz is implemented at a per-CPU level. Maybe Andrew can > weigh in on that. > Hi Samuel, I've approached Zicboz the same way I would approach all extensions, which is to be per-hart. I'm not currently aware of a platform that is / will be composed of harts where some have Zicboz and others don't, but there's nothing stopping a platform like that from being built. I realize this adds complexity that we may not want to manage in Linux without an actual use case requiring it. I wouldn't be opposed to keeping things simple for now, only bringing in complexity when needed (for this extension or for a future extension with envcfg bits), but we should ensure we make it clear that we're making those simplifications now based on assumptions, and we may need to change things later. Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv