Re: [PATCH 1/5] riscv: nommu: remove PAGE_OFFSET hardcoding

Bo Gan
2024-03-25T22:46:21Z

On 3/25/24 9:40 AM, Jisheng Zhang wrote:
> Currently, PAGE_OFFSET is hardcoded as 0x8000_0000, it works fine since
> there's only one nommu platform in the mainline. However, there are
> many cases where the (S)DRAM base address isn't 0x8000_0000, so remove
> the hardcoding value, and introduce DRAM_BASE which will be set by
> users during configuring. DRAM_BASE is 0x8000_0000 by default.
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
> arch/riscv/Kconfig | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 7895c77545f1..afd51dbdc253 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -247,10 +247,16 @@ config MMU
> Select if you want MMU-based virtualised addressing space
> support by paged memory management. If unsure, say 'Y'.
>
> +if !MMU
> +config DRAM_BASE
> + hex '(S)DRAM Base Address'
> + default 0x80000000
> +endif
> +
> config PAGE_OFFSET
> hex
> default 0xC0000000 if 32BIT && MMU
> - default 0x80000000 if !MMU
> + default DRAM_BASE if !MMU
> default 0xff60000000000000 if 64BIT
>
> config KASAN_SHADOW_OFFSET
>

Thanks for this patch. I did something similar in my local nommu
linux-6.8 tree in order to run it on the S7 hart of JH7110. I have
another suggestion for you. Perhaps we should also make TASK_SIZE
configurable, and let it default to `0xffffffff if 32BIT && !MMU`
and `DRAM_BASE + DRAM_SIZE if 64BIT && !MMU`. Currently TASK_SIZE
is effectively `0xffffffff if !MMU`, which doesn't work if I run
rv64 linux-nommu with DDR that spans across 4G boundary.

I see there's another patchset that tries to define TASK_SIZE_MAX
for __access_ok(). Looks like that only affects the MMU case, and
NOMMU is not touched. My aforementioned change won't conflict with
it should it get merged.

Bo