Re: [RFC 1/2] riscv: process: Introduce idle thread using Zawrs extension

Conor Dooley
2024-04-18T22:10:10Z

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On Thu, Apr 18, 2024 at 05:00:42PM -0500, Samuel Holland wrote:
> Hi Drew,
>
> On 2024-04-18 2:10 PM, Andrew Jones wrote:
> > On Thu, Apr 18, 2024 at 04:05:55PM +0100, Conor Dooley wrote:
> >> + Drew,
> >>
> >> On Thu, Apr 18, 2024 at 07:49:41PM +0800, Xu Lu wrote:
> >>> The Zawrs extension introduces a new instruction WRS.NTO, which will
> >>> register a reservation set and causes the hart to temporarily stall
> >>> execution in a low-power state until a store occurs to the reservation
> >>> set or an interrupt is observed.
> >>>
> >>> This commit implements new version of idle thread for RISC-V via Zawrs
> >>> extension.
> >>>
> >>> Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
> >>> Reviewed-by: Hangjing Li <lihangjing@bytedance.com>
> >>> Reviewed-by: Liang Deng <dengliang.1214@bytedance.com>
> >>> Reviewed-by: Wen Chai <chaiwen.cc@bytedance.com>
> >>> ---
> >>> arch/riscv/Kconfig | 24 +++++++++++++++++
> >>> arch/riscv/include/asm/cpuidle.h | 11 +-------
> >>> arch/riscv/include/asm/hwcap.h | 1 +
> >>> arch/riscv/include/asm/processor.h | 17 +++++++++++++
> >>> arch/riscv/kernel/cpu.c | 5 ++++
> >>> arch/riscv/kernel/cpufeature.c | 1 +
> >>> arch/riscv/kernel/process.c | 41 +++++++++++++++++++++++++++++-
> >>> 7 files changed, 89 insertions(+), 11 deletions(-)
> >>>
> >>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> >>> index be09c8836d56..a0d344e9803f 100644
> >>> --- a/arch/riscv/Kconfig
> >>> +++ b/arch/riscv/Kconfig
> >>> @@ -19,6 +19,7 @@ config RISCV
> >>> select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> >>> select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
> >>> select ARCH_HAS_BINFMT_FLAT
> >>> + select ARCH_HAS_CPU_FINALIZE_INIT
> >>> select ARCH_HAS_CURRENT_STACK_POINTER
> >>> select ARCH_HAS_DEBUG_VIRTUAL if MMU
> >>> select ARCH_HAS_DEBUG_VM_PGTABLE
> >>> @@ -525,6 +526,20 @@ config RISCV_ISA_SVPBMT
> >>>
> >>> If you don't know what to do here, say Y.
> >>>
> >>> +config RISCV_ISA_ZAWRS
> >>> + bool "Zawrs extension support for wait-on-reservation-set instructions"
> >>> + depends on RISCV_ALTERNATIVE
> >>> + default y
> >>> + help
> >>> + Adds support to dynamically detect the presence of the Zawrs
> >>> + extension and enable its usage.
> >>
> >> Drew, could you, in your update, use the wording:
> >> Add support for enabling optimisations in the kernel when the
> >> Zawrs extension is detected at boot.
> >
> > How about

Probably should have said, this was just a replacement for the first
paragraph, not the entire text.

> >
> > The Zawrs extension defines a pair of instructions to be used in
> > polling loops which allow a hart to enter a low-power state or to
> > trap to the hypervisor while waiting on a store to a memory location.
> > Enable the use of these instructions when the Zawrs extension is
>
> ^ in the kernel
>
> I believe "in the kernel" was an important part of the clarification that these
> Kconfig options do not affect whether userspace can use these instructions.

Meant to reply earlier but forgot. Samuel's correct, it is indeed the
key bit I wanted, I just suggest what's above to match what was in the
patch I had sent earlier today. Don't really care all that much if it
is a match nor not, but I do care about the help text actually
describing /who/ gets to use the extension when the option is enabled.

Thanks,
Conor.

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