From: Atish Patra <atishp@rivosinc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atishp@rivosinc.com>,
Andrew Jones <ajones@ventanamicro.com>,
Ajay Kaher <ajay.kaher@broadcom.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alexghiti@rivosinc.com>,
Anup Patel <anup@brainfault.org>,
samuel.holland@sifive.com,
Conor Dooley <conor.dooley@microchip.com>,
Juergen Gross <jgross@suse.com>,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Shuah Khan <shuah@kernel.org>,
virtualization@lists.linux.dev, Will Deacon <will@kernel.org>,
x86@kernel.org
Subject: [PATCH v8 08/24] drivers/perf: riscv: Fix counter mask iteration for RV32
Date: Sat, 20 Apr 2024 08:17:24 -0700 [thread overview]
Message-ID: <20240420151741.962500-9-atishp@rivosinc.com> (raw)
In-Reply-To: <20240420151741.962500-1-atishp@rivosinc.com>
For RV32, used_hw_ctrs can have more than 1 word if the firmware chooses
to interleave firmware/hardware counters indicies. Even though it's a
unlikely scenario, handle that case by iterating over all the words
instead of just using the first word.
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
drivers/perf/riscv_pmu_sbi.c | 21 ++++++++++++---------
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index f23501898657..4eacd89141a9 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -652,10 +652,12 @@ static inline void pmu_sbi_stop_all(struct riscv_pmu *pmu)
static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu)
{
struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events);
+ int i;
- /* No need to check the error here as we can't do anything about the error */
- sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, 0,
- cpu_hw_evt->used_hw_ctrs[0], 0, 0, 0, 0);
+ for (i = 0; i < BITS_TO_LONGS(RISCV_MAX_COUNTERS); i++)
+ /* No need to check the error here as we can't do anything about the error */
+ sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, i * BITS_PER_LONG,
+ cpu_hw_evt->used_hw_ctrs[i], 0, 0, 0, 0);
}
/*
@@ -667,7 +669,7 @@ static inline void pmu_sbi_stop_hw_ctrs(struct riscv_pmu *pmu)
static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu,
unsigned long ctr_ovf_mask)
{
- int idx = 0;
+ int idx = 0, i;
struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events);
struct perf_event *event;
unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE;
@@ -676,11 +678,12 @@ static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu,
struct hw_perf_event *hwc;
u64 init_val = 0;
- ctr_start_mask = cpu_hw_evt->used_hw_ctrs[0] & ~ctr_ovf_mask;
-
- /* Start all the counters that did not overflow in a single shot */
- sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, 0, ctr_start_mask,
- 0, 0, 0, 0);
+ for (i = 0; i < BITS_TO_LONGS(RISCV_MAX_COUNTERS); i++) {
+ ctr_start_mask = cpu_hw_evt->used_hw_ctrs[i] & ~ctr_ovf_mask;
+ /* Start all the counters that did not overflow in a single shot */
+ sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, i * BITS_PER_LONG, ctr_start_mask,
+ 0, 0, 0, 0);
+ }
/* Reinitialize and start all the counter that overflowed */
while (ctr_ovf_mask) {
--
2.34.1
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next prev parent reply other threads:[~2024-04-19 23:55 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-20 15:17 [PATCH v8 00/24] RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest Atish Patra
2024-04-20 15:17 ` [PATCH v8 01/24] RISC-V: Fix the typo in Scountovf CSR name Atish Patra
2024-04-20 15:17 ` [PATCH v8 02/24] RISC-V: Add FIRMWARE_READ_HI definition Atish Patra
2024-04-20 15:17 ` [PATCH v8 03/24] drivers/perf: riscv: Read upper bits of a firmware counter Atish Patra
2024-04-20 15:17 ` [PATCH v8 04/24] drivers/perf: riscv: Use BIT macro for shifting operations Atish Patra
2024-04-20 15:17 ` [PATCH v8 05/24] RISC-V: Add SBI PMU snapshot definitions Atish Patra
2024-04-20 15:17 ` [PATCH v8 06/24] RISC-V: KVM: Rename the SBI_STA_SHMEM_DISABLE to a generic name Atish Patra
2024-04-20 15:17 ` [PATCH v8 07/24] RISC-V: Use the minor version mask while computing sbi version Atish Patra
2024-04-20 15:17 ` Atish Patra [this message]
2024-04-20 0:37 ` [PATCH v8 08/24] drivers/perf: riscv: Fix counter mask iteration for RV32 Samuel Holland
2024-04-20 1:08 ` Atish Kumar Patra
2024-04-20 15:17 ` [PATCH v8 09/24] drivers/perf: riscv: Implement SBI PMU snapshot function Atish Patra
2024-04-22 16:06 ` Samuel Holland
2024-04-23 20:34 ` Atish Kumar Patra
2024-04-20 15:17 ` [PATCH v8 10/24] RISC-V: KVM: Fix the initial sample period value Atish Patra
2024-04-22 5:24 ` Anup Patel
2024-04-20 15:17 ` [PATCH v8 11/24] RISC-V: KVM: No need to update the counter value during reset Atish Patra
2024-04-20 15:17 ` [PATCH v8 12/24] RISC-V: KVM: No need to exit to the user space if perf event failed Atish Patra
2024-04-20 15:17 ` [PATCH v8 13/24] RISC-V: KVM: Implement SBI PMU Snapshot feature Atish Patra
2024-04-20 15:17 ` [PATCH v8 14/24] RISC-V: KVM: Add perf sampling support for guests Atish Patra
2024-04-20 15:17 ` [PATCH v8 15/24] RISC-V: KVM: Support 64 bit firmware counters on RV32 Atish Patra
2024-04-20 15:17 ` [PATCH v8 16/24] RISC-V: KVM: Improve firmware counter read function Atish Patra
2024-04-22 5:26 ` Anup Patel
2024-04-20 15:17 ` [PATCH v8 17/24] KVM: riscv: selftests: Move sbi definitions to its own header file Atish Patra
2024-04-22 5:27 ` Anup Patel
2024-04-23 8:57 ` Muhammad Usama Anjum
2024-04-20 15:17 ` [PATCH v8 18/24] KVM: riscv: selftests: Add helper functions for extension checks Atish Patra
2024-04-22 5:29 ` Anup Patel
2024-04-23 8:57 ` Muhammad Usama Anjum
2024-04-20 15:17 ` [PATCH v8 19/24] KVM: riscv: selftests: Add Sscofpmf to get-reg-list test Atish Patra
2024-04-23 8:58 ` Muhammad Usama Anjum
2024-04-20 15:17 ` [PATCH v8 20/24] KVM: riscv: selftests: Add SBI PMU extension definitions Atish Patra
2024-04-23 8:58 ` Muhammad Usama Anjum
2024-04-20 15:17 ` [PATCH v8 21/24] KVM: riscv: selftests: Add SBI PMU selftest Atish Patra
2024-04-23 8:59 ` Muhammad Usama Anjum
2024-04-20 15:17 ` [PATCH v8 22/24] KVM: riscv: selftests: Add a test for PMU snapshot functionality Atish Patra
2024-04-23 9:00 ` Muhammad Usama Anjum
2024-04-20 15:17 ` [PATCH v8 23/24] KVM: riscv: selftests: Add a test for counter overflow Atish Patra
2024-04-23 9:00 ` Muhammad Usama Anjum
2024-04-20 15:17 ` [PATCH v8 24/24] KVM: riscv: selftests: Add commandline option for SBI PMU test Atish Patra
2024-04-22 5:32 ` Anup Patel
2024-04-23 9:03 ` Muhammad Usama Anjum
2024-04-23 10:56 ` Andrew Jones
2024-04-22 9:59 ` [PATCH v8 00/24] RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest Anup Patel
2024-04-30 5:54 ` Anup Patel
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