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[142.68.80.239]) by smtp.gmail.com with ESMTPSA id q24-20020a05620a0c9800b0078d677e72f3sm12388656qki.118.2024.05.01.07.20.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 May 2024 07:20:37 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1s2Ap3-00DSge-F2; Wed, 01 May 2024 11:20:37 -0300 Date: Wed, 1 May 2024 11:20:37 -0300 From: Jason Gunthorpe To: Baolu Lu Subject: Re: [PATCH v3 2/7] iommu/riscv: Add RISC-V IOMMU platform device driver Message-ID: <20240501142037.GC1723318@ziepe.ca> References: <6b4a4dc0-ac9e-43cd-bd84-447df2370dde@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <6b4a4dc0-ac9e-43cd-bd84-447df2370dde@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240501_072041_024644_7DEED528 X-CRM114-Status: GOOD ( 24.78 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , devicetree@vger.kernel.org, Conor Dooley , Albert Ou , Tomasz Jeznach , linux@rivosinc.com, Robin Murphy , Joerg Roedel , linux-kernel@vger.kernel.org, Rob Herring , Sebastien Boeuf , iommu@lists.linux.dev, Palmer Dabbelt , Paul Walmsley , Nick Kossifidis , Krzysztof Kozlowski , Will Deacon , linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, May 01, 2024 at 06:26:20PM +0800, Baolu Lu wrote: > On 2024/5/1 4:01, Tomasz Jeznach wrote: > > +static int riscv_iommu_init_check(struct riscv_iommu_device *iommu) > > +{ > > + u64 ddtp; > > + > > + /* > > + * Make sure the IOMMU is switched off or in pass-through mode during regular > > + * boot flow and disable translation when we boot into a kexec kernel and the > > + * previous kernel left them enabled. > > + */ > > + ddtp = riscv_iommu_readq(iommu, RISCV_IOMMU_REG_DDTP); > > + if (ddtp & RISCV_IOMMU_DDTP_BUSY) > > + return -EBUSY; > > + > > + if (FIELD_GET(RISCV_IOMMU_DDTP_MODE, ddtp) > RISCV_IOMMU_DDTP_MODE_BARE) { > > + if (!is_kdump_kernel()) > > Is kdump supported for RISC-V architectures? If so, the documentation > in Documentation/admin-guide/kdump/kdump.rst might need an update. > > There is a possibility of ongoing DMAs during the boot process of the > kdump capture kernel because there's a small chance of legacy DMA setups > targeting any memory location. Kdump typically allows these ongoing DMA > transfers to complete, assuming they were intended for valid memory > regions. > > The IOMMU subsystem implements a default domain deferred attachment > mechanism for this. In the kdump capture kernel, the whole device > context tables are copied from the original kernel and will be > overridden once the device driver calls the kernel DMA interface for the > first time. This assumes that all old DMA transfers are completed after > the driver's takeover. > > Will you consider this for RISC-V architecture as well? It seems we decided not to do that mess in ARM.. New architectures doing kdump should put the iommu in a full blocking state before handing over the next kernel, and this implies that devices drivers need to cleanly suspend their DMAs before going into the next kernel. Jason _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv