From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 12B84C25B74 for ; Sat, 18 May 2024 07:52:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MNkhLKBTmM3a3fNB5/fHd+bOebPYxyt4Jvj4k/1cClE=; b=xfYI8foRouZPrG Lv1pf2SLCxNMTC6CK9/wrPmw722YgRoAMtefwrANHDRFLtA5kOblofGUwJBJxio/zCx0x4SSiodUm zOMkfeIlEx8A9eGpfxBU1pWvAGtyd1wkyiGHDAfSdWo1kjIy3gCBnaayk6jUfcNuBBmKqDI9b/+/R +jwMRGUemBySILE+zOKh4pGjUCjGEtyCDpePlpsn5xQw1ySZh2AKjE8yHtEW66mo/MUL0jReSeAif zaJWX8Xeh/BRIza8qCj8jLKnPYwDUB0WbpygDL/0exjOQrj02iDnN35HVmo6vpxPy5RbM22t+Vu3C U1QsJP+pZW+enIGNTK6A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s8ErH-00000009ixX-0IYM; Sat, 18 May 2024 07:51:59 +0000 Received: from out0-221.mail.aliyun.com ([140.205.0.221]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s8ErB-00000009isc-3UaH for linux-riscv@lists.infradead.org; Sat, 18 May 2024 07:51:55 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=antgroup.com; s=default; t=1716018699; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=+bO7c6Fed9Mvc6QZ6EoE0oDQLTarOYB8F6MuXkDP9CA=; b=yMIEh2Lgprel0tFYuxJmqY7DZijLwS7B4mLm3vJBTFpK5qH5w8Y3Iz/gOCdI9tvkKZRoce8otT2Kvd5dnlCm0/hlw6WpbOPCfpx1XVRE6WlmrBssh33dclbcHNDc78siMZv6x/67CbLY/WR5q1cfhF9IhavuGhA4Z2C5dX3fCs0= X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R111e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018047207;MF=libang.li@antgroup.com;NM=1;PH=DS;RN=16;SR=0;TI=SMTPD_---.Xg92GHN_1716018694; Received: from localhost(mailfrom:libang.li@antgroup.com fp:SMTPD_---.Xg92GHN_1716018694) by smtp.aliyun-inc.com; Sat, 18 May 2024 15:51:35 +0800 From: "Bang Li" To: akpm@linux-foundation.org, chenhuacai@kernel.org, tsbogend@alpha.franken.de, paul.walmsley@sifive.com, palmer@dabbelt.com, chris@zankel.net, jcmvbkbc@gmail.com Cc: , , , , , , , , "Bang Li" Subject: [PATCH v3 1/3] mm: Add update_mmu_tlb_range() Date: Sat, 18 May 2024 15:49:12 +0800 Message-Id: <20240518074914.52170-2-libang.li@antgroup.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20240518074914.52170-1-libang.li@antgroup.com> References: <20240518074914.52170-1-libang.li@antgroup.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240518_005154_029334_99DF995E X-CRM114-Status: UNSURE ( 6.85 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Added update_mmu_tlb_range(), we can batch update tlb of an address range. Signed-off-by: Bang Li --- arch/loongarch/include/asm/pgtable.h | 2 ++ arch/mips/include/asm/pgtable.h | 2 ++ arch/riscv/include/asm/pgtable.h | 2 ++ arch/xtensa/include/asm/pgtable.h | 3 +++ arch/xtensa/mm/tlb.c | 6 ++++++ 5 files changed, 15 insertions(+) diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/include/asm/pgtable.h index af3acdf3481a..5ccc2a3a6f7a 100644 --- a/arch/loongarch/include/asm/pgtable.h +++ b/arch/loongarch/include/asm/pgtable.h @@ -469,6 +469,8 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf, #define __HAVE_ARCH_UPDATE_MMU_TLB #define update_mmu_tlb update_mmu_cache +#define update_mmu_tlb_range(vma, addr, ptep, nr) \ + update_mmu_cache_range(NULL, vma, addr, ptep, nr) static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index e27a4c83c548..0891ad7d43b6 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -596,6 +596,8 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf, #define __HAVE_ARCH_UPDATE_MMU_TLB #define update_mmu_tlb update_mmu_cache +#define update_mmu_tlb_range(vma, address, ptep, nr) \ + update_mmu_cache_range(NULL, vma, address, ptep, nr) static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 661b2b4fe758..fc07b829ac4a 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -488,6 +488,8 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf, #define __HAVE_ARCH_UPDATE_MMU_TLB #define update_mmu_tlb update_mmu_cache +#define update_mmu_tlb_range(vma, addr, ptep, nr) \ + update_mmu_cache_range(NULL, vma, addr, ptep, nr) static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h index 9a7e5e57ee9a..436158bd9030 100644 --- a/arch/xtensa/include/asm/pgtable.h +++ b/arch/xtensa/include/asm/pgtable.h @@ -413,6 +413,9 @@ typedef pte_t *pte_addr_t; void update_mmu_tlb(struct vm_area_struct *vma, unsigned long address, pte_t *ptep); #define __HAVE_ARCH_UPDATE_MMU_TLB +void update_mmu_tlb_range(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep, unsigned int nr); +#define update_mmu_tlb_range update_mmu_tlb_range #endif /* !defined (__ASSEMBLY__) */ diff --git a/arch/xtensa/mm/tlb.c b/arch/xtensa/mm/tlb.c index d8b60d6e50a8..05efba86b870 100644 --- a/arch/xtensa/mm/tlb.c +++ b/arch/xtensa/mm/tlb.c @@ -169,6 +169,12 @@ void update_mmu_tlb(struct vm_area_struct *vma, local_flush_tlb_page(vma, address); } +void update_mmu_tlb_range(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep, unsigned int nr) +{ + local_flush_tlb_range(vma, address, address + PAGE_SIZE * nr); +} + #ifdef CONFIG_DEBUG_TLB_SANITY static unsigned get_pte_for_vaddr(unsigned vaddr) -- 2.19.1.6.gb485710b _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv