From: Kanak Shilledar <kanakshilledar@gmail.com>
Cc: kanakshilledar111@protonmail.com,
Kanak Shilledar <kanakshilledar@gmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Samuel Holland <samuel.holland@sifive.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v4 2/2] dt-bindings: riscv: cpus: add ref to interrupt-controller
Date: Sun, 9 Jun 2024 15:37:08 +0530 [thread overview]
Message-ID: <20240609100710.85055-3-kanakshilledar@gmail.com> (raw)
In-Reply-To: <20240609100710.85055-1-kanakshilledar@gmail.com>
removed the redundant properties for interrupt-controller
and provide reference to the riscv,cpu-intc.yaml which defines
the interrupt-controller. making the properties for riscv
interrupt-controller at a central place.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com>
---
Changes in v4:
- Change DCO email to @gmail.com
Changes in v3:
- No change.
- Rolling out as RESEND.
Changes in v2:
- Fix warning of `type` is a required property during `make
dt_bindings_check`.
---
.../devicetree/bindings/riscv/cpus.yaml | 21 +------------------
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index d87dd50f1a4b..f1241e5e8753 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -102,26 +102,7 @@ properties:
interrupt-controller:
type: object
- additionalProperties: false
- description: Describes the CPU's local interrupt controller
-
- properties:
- '#interrupt-cells':
- const: 1
-
- compatible:
- oneOf:
- - items:
- - const: andestech,cpu-intc
- - const: riscv,cpu-intc
- - const: riscv,cpu-intc
-
- interrupt-controller: true
-
- required:
- - '#interrupt-cells'
- - compatible
- - interrupt-controller
+ $ref: /schemas/interrupt-controller/riscv,cpu-intc.yaml#
cpu-idle-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
--
2.45.2
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prev parent reply other threads:[~2024-06-09 10:07 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-09 10:07 [PATCH v4 0/2] dt-bindings: interrupt-controller: riscv,cpu-intc Kanak Shilledar
2024-06-09 10:07 ` [PATCH v4 1/2] dt-bindings: interrupt-controller: riscv,cpu-intc: convert to dtschema Kanak Shilledar
2024-06-09 10:07 ` Kanak Shilledar [this message]
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