From: Zong Li <zong.li@sifive.com>
To: joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
tjeznach@rivosinc.com, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu, jgg@ziepe.ca,
kevin.tian@intel.com, linux-kernel@vger.kernel.org,
iommu@lists.linux.dev, linux-riscv@lists.infradead.org
Cc: Zong Li <zong.li@sifive.com>
Subject: [RFC PATCH v2 06/10] iommu/riscv: support nested iommu for getting iommu hardware information
Date: Fri, 14 Jun 2024 22:21:52 +0800 [thread overview]
Message-ID: <20240614142156.29420-7-zong.li@sifive.com> (raw)
In-Reply-To: <20240614142156.29420-1-zong.li@sifive.com>
This patch implements .hw_info operation and the related data
structures for passing the IOMMU hardware capabilities for iommufd.
Signed-off-by: Zong Li <zong.li@sifive.com>
---
drivers/iommu/riscv/iommu.c | 20 ++++++++++++++++++++
include/uapi/linux/iommufd.h | 18 ++++++++++++++++++
2 files changed, 38 insertions(+)
diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
index 45309bd096e5..2130106e421f 100644
--- a/drivers/iommu/riscv/iommu.c
+++ b/drivers/iommu/riscv/iommu.c
@@ -19,6 +19,7 @@
#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/pci.h>
+#include <uapi/linux/iommufd.h>
#include "../iommu-pages.h"
#include "iommu-bits.h"
@@ -1567,6 +1568,24 @@ static struct iommu_domain riscv_iommu_identity_domain = {
}
};
+static void *riscv_iommu_hw_info(struct device *dev, u32 *length, u32 *type)
+{
+ struct riscv_iommu_device *iommu = dev_to_iommu(dev);
+ struct iommu_hw_info_riscv_iommu *info;
+
+ info = kzalloc(sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return ERR_PTR(-ENOMEM);
+
+ info->capability = iommu->caps;
+ info->fctl = riscv_iommu_readl(iommu, RISCV_IOMMU_REG_FCTL);
+
+ *length = sizeof(*info);
+ *type = IOMMU_HW_INFO_TYPE_RISCV_IOMMU;
+
+ return info;
+}
+
static int riscv_iommu_device_domain_type(struct device *dev)
{
return 0;
@@ -1644,6 +1663,7 @@ static void riscv_iommu_release_device(struct device *dev)
static const struct iommu_ops riscv_iommu_ops = {
.pgsize_bitmap = SZ_4K,
.of_xlate = riscv_iommu_of_xlate,
+ .hw_info = riscv_iommu_hw_info,
.identity_domain = &riscv_iommu_identity_domain,
.blocked_domain = &riscv_iommu_blocking_domain,
.release_domain = &riscv_iommu_blocking_domain,
diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h
index 1dfeaa2e649e..736f4408b5e0 100644
--- a/include/uapi/linux/iommufd.h
+++ b/include/uapi/linux/iommufd.h
@@ -475,15 +475,33 @@ struct iommu_hw_info_vtd {
__aligned_u64 ecap_reg;
};
+/**
+ * struct iommu_hw_info_riscv_iommu - RISCV IOMMU hardware information
+ *
+ * @capability: Value of RISC-V IOMMU capability register defined in
+ * RISC-V IOMMU spec section 5.3 IOMMU capabilities
+ * @fctl: Value of RISC-V IOMMU feature control register defined in
+ * RISC-V IOMMU spec section 5.4 Features-control register
+ *
+ * Don't advertise ATS support to the guest because driver doesn't support it.
+ */
+struct iommu_hw_info_riscv_iommu {
+ __aligned_u64 capability;
+ __u32 fctl;
+ __u32 __reserved;
+};
+
/**
* enum iommu_hw_info_type - IOMMU Hardware Info Types
* @IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not report hardware
* info
* @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
+ * @IOMMU_HW_INFO_TYPE_RISCV_IOMMU: RISC-V iommu info type
*/
enum iommu_hw_info_type {
IOMMU_HW_INFO_TYPE_NONE,
IOMMU_HW_INFO_TYPE_INTEL_VTD,
+ IOMMU_HW_INFO_TYPE_RISCV_IOMMU,
};
/**
--
2.17.1
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next prev parent reply other threads:[~2024-06-14 14:22 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-14 14:21 [RFC PATCH v2 00/10] RISC-V IOMMU HPM and nested IOMMU support Zong Li
2024-06-14 14:21 ` [RFC PATCH v2 01/10] iommu/riscv: add RISC-V IOMMU PMU support Zong Li
2024-06-17 14:55 ` Jason Gunthorpe
2024-06-18 1:14 ` Zong Li
2024-06-14 14:21 ` [RFC PATCH v2 02/10] iommu/riscv: support HPM and interrupt handling Zong Li
2024-12-10 7:54 ` [External] " yunhui cui
2024-12-10 8:48 ` Xu Lu
2024-12-27 8:37 ` Zong Li
2025-09-01 13:36 ` [RFC PATCH v2 00/10] RISC-V IOMMU HPM and nested IOMMU support niliqiang
2025-09-02 4:01 ` Zong Li
2024-06-14 14:21 ` [RFC PATCH v2 03/10] iommu/riscv: use data structure instead of individual values Zong Li
2024-06-14 14:21 ` [RFC PATCH v2 04/10] iommu/riscv: add iotlb_sync_map operation support Zong Li
2024-06-15 3:14 ` Baolu Lu
2024-06-17 13:43 ` Zong Li
2024-06-17 14:39 ` Jason Gunthorpe
2024-06-18 3:01 ` Zong Li
2024-06-18 13:31 ` Jason Gunthorpe
2024-06-14 14:21 ` [RFC PATCH v2 05/10] iommu/riscv: support GSCID and GVMA invalidation command Zong Li
2024-06-14 14:21 ` Zong Li [this message]
2024-06-19 15:49 ` [RFC PATCH v2 06/10] iommu/riscv: support nested iommu for getting iommu hardware information Jason Gunthorpe
2024-06-21 7:32 ` Zong Li
2024-06-14 14:21 ` [RFC PATCH v2 07/10] iommu/riscv: support nested iommu for creating domains owned by userspace Zong Li
2024-06-19 16:02 ` Jason Gunthorpe
2024-06-28 9:03 ` Zong Li
2024-06-28 22:32 ` Jason Gunthorpe
2024-06-19 16:34 ` Joao Martins
2024-06-21 7:34 ` Zong Li
2024-06-14 14:21 ` [RFC PATCH v2 08/10] iommu/riscv: support nested iommu for flushing cache Zong Li
2024-06-15 3:22 ` Baolu Lu
2024-06-17 2:16 ` Zong Li
2024-06-19 16:17 ` Jason Gunthorpe
2024-06-28 8:19 ` Zong Li
2024-06-28 22:26 ` Jason Gunthorpe
2024-06-14 14:21 ` [RFC PATCH v2 09/10] iommu/dma: Support MSIs through nested domains Zong Li
2024-06-14 18:12 ` Nicolin Chen
2024-06-17 2:15 ` Zong Li
2024-06-14 14:21 ` [RFC PATCH v2 10/10] iommu:riscv: support nested iommu for get_msi_mapping_domain operation Zong Li
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